ia3222 integration, ia3222 Datasheet - Page 4

• Manufacturer Part Number: ia3222
• Description: Ia3222/ia3223 Ez Daa? Chipset With Analog Interface
• Manufacturer: integration

IA3222/IA3223
TABLE OF FIGURES
Figure 1: Serial interface write-cycle timing diagram (Data output pin floating)................................................................................. 10
Figure 2: Serial interface read-cycle timing diagram............................................................................................................................ 11
Figure 3: Transmit gain with resistive loads.......................................................................................................................................... 15
Figure 4: Transmit gain with complex loads.......................................................................................................................................... 15
Figure 5: Transmit gain at high frequencies, 600 Ω............................................................................................................................. 15
Figure 6: Receive gain versus frequency .............................................................................................................................................. 15
Figure 7: Receive gain at high frequencies, 600 Ω .............................................................................................................................. 15
Figure 8: Snoop gain versus frequency................................................................................................................................................. 15
Figure 9: Snoop gain versus line DC voltage ........................................................................................................................................ 16
Figure 10: Snoop noise versus line DC voltage .................................................................................................................................... 16
Figure 11: DC voltage versus current, no regulation ............................................................................................................................ 16
Figure 12: DC voltage versus current, TBR21 regulation..................................................................................................................... 16
Figure 13: Return loss for resistive modes ........................................................................................................................................... 16
Figure 14: Return loss for complex modes ........................................................................................................................................... 16
Figure 15: Trans-hybrid loss for resistive modes.................................................................................................................................. 17
Figure 16: Trans-hybrid loss for complex modes.................................................................................................................................. 17
Figure 17: Trans-hybrid loss in 600Ω mode with various loads........................................................................................................... 17
Figure 18: Current-sensor gain versus temperature s ......................................................................................................................... 17
Figure 19: Parallel-pickup sensitivity to transmitted signals ............................................................................................................... 17
Figure 20: Transmitter-path PSR aliasing into audio band with selected out-of-band frequencies................................................... 17
Figure 21: Receiver-path PSR aliasing into audio band with selected out-of-band frequencies ....................................................... 18
Figure 22: Aliasing into audio band (signals at selected out-of-band frequencies injected into Tx pin............................................. 18
Figure 23: Transmitter-path CMR aliasing into audio band with selected out-of-band frequencies.................................................. 18
Figure 24: Receiver out-of-band spurs .................................................................................................................................................. 18
Figure 21: RF immunity, IEC61000-4-6 method .................................................................................................................................. 18
Figure 22: Transmit gain versus ACIN capacitor................................................................................................................................... 18
Figure 23: Application schematic .......................................................................................................................................................... 22
Figure 24: Application schematic for legacy TBR21 current-limit support .......................................................................................... 24
Figure 25: IA3222/3223 evaluation board .......................................................................................................................................... 26
Figure 26: IA3222/3223 evaluation board layout ............................................................................................................................... 27
Figure 27: Single-ended interface ......................................................................................................................................................... 29
Figure 28: Differential interface — without reference .......................................................................................................................... 29
Figure 29: Differential interface — with reference................................................................................................................................ 29
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