mk50dn512zcll10 Freescale Semiconductor, Inc, mk50dn512zcll10 Datasheet - Page 21

• Manufacturer Part Number: mk50dn512zcll10
• Description: K50 Sub-family Data Sheet Supports The Following
• Manufacturer: Freescale Semiconductor, Inc

5.2.2 General switching specifications
These general purpose specifications apply to all signals configured for GPIO, UART,
CMT, and I
1. The greater synchronous and asynchronous timing must be met.
Freescale Semiconductor, Inc.
Symbol
Symbol
f
f
LPTMR
FLASH
Flash clock
LPTMR clock
GPIO pin interrupt pulse width (digital glitch filter
disabled) — Synchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter enabled) — Asynchronous path
GPIO pin interrupt pulse width (digital glitch filter
disabled, analog filter disabled) — Asynchronous path
External reset pulse width (digital glitch filter disabled)
Mode select (EZP_CS) hold time after reset
deassertion
Port rise and fall time (high drive strength)
Port rise and fall time (low drive strength)
Description
Description
2
C signals.
• Slew disabled
• Slew enabled
• Slew disabled
• Slew enabled
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
• 1.71 ≤ V
• 2.7 ≤ V
Table 9. Device clock specifications (continued)
K50 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
Table 10. General switching specifications
DD
DD
DD
DD
DD
DD
DD
DD
≤ 3.6V
≤ 3.6V
≤ 3.6V
≤ 3.6V
≤ 2.7V
≤ 2.7V
≤ 2.7V
≤ 2.7V
Preliminary
Min.
Min.
100
100
1.5
16
—
—
—
—
—
—
—
—
—
—
2
Max.
Max.
TBD
TBD
TBD
TBD
25
12
36
32
36
—
—
—
—
—
1
Bus clock
Bus clock
cycles
cycles
MHz
MHz
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
Notes
General
1
2
2
2
3
4
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