pbl386112sht ETC-unknow, pbl386112sht Datasheet - Page 14

• Manufacturer Part Number: pbl386112sht
• Description: Subscriber Line Interface Circuit
• Manufacturer: ETC-unknow

PBL 386 11/2
Analog Temperature Guard
The widely varying environmental condi-
tions in which SLICs operate may lead to
the chip temperature limitations being ex-
ceeded. The PBL 386 11/2 SLIC reduces
the dc line current and the longitudinal
current limit when the chip temperature
reaches approximately 145 C and increas-
es it again automatically when the temper-
ature drops.
logic low level when the temperature guard
is active.
14
Figure 13. Single-channel subscriber line interface with PBL 386 11/2 and combination CODEC/filter
The detector output, DET, is forced to a
RESISTORS: (Values according to IEC-63 E96
series)
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
SG
LD
LC
REF
T
TX
B
RX
FB
1
2
3
4
RT
RF
F1
, R
+12 V /+5V
F2
RING
TIP
VB2
VB
= 23.7 k
= 49.9 k
= 18.7 k
= 15 k
= 105 k
= 32.4k
= 57.6k
= 105k
Depending on CODEC / filter
= 604 k
= 604 k
= 249 k
= 280 k
= 332
= 332
= Line resistor, 40
KR
E
D
RG
B
R
RF
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
1%
5% 2 W
5% 2 W
R
R
R
RT
F1
F2
1
1
1
1
1
1
1
1
1
1
1
1
/
/
/
/
/
/
/
/
/
/
/
/
D
10
10
10
10
10
10
10
10
10
10
10
10
BB
1%
W
W
W
W
W
W
W
W
W
W
W
W
D
C
OVP
B2
GG
R
R
1
2
VB
Loop Monitoring Functions
The loop current, ground key and ring trip
detectors report their status through a com-
mon output, DET. The status of the detec-
tor pin, DET, is selected via the three bit
control interface C1, C2 and C3. Please
refer to section Control Inputs for a descrip-
tion of the control interface.
Loop Current Detector
The loop current detector indicates that the
telephone is off hook and that DC current is
flowing in the loop by putting the output pin
CAPACITORS:(Values according to IEC-63 E6
series)
C
C
C
C
C
C
C
C
C
C
C
*100V if VEE pin connected to VBAT, VBAT2
B
B2
VCC
VEE
TC
RC
HP
LP
GG
1
2
C
C
B2
B
C
1
C
C
RC
TC
R
= 100 nF
= 150 nF
= 100 nF
= 100 nF
= optional
= optional
= 68 nF
= 330 nF
= 220 nF
= 330 nF
= 330 nF
3
R
4
C
C
HP
LP
R
SG
C
2
100 V 20%
100 V 20%
100 V 20%
100 V 20%
100 V 20%
PBL 386 11/2
RRLY
RINGX
BGND
TIPX
VBAT
VBAT2
AOV
PSG
TS
NC
HP
LP
DR
DT
10 V 20%
10 V* 20%
63 V 10%
63 V 10%
AGND
RSN
VCC
VTX
DET
PLD
PLC
SPR
REF
VEE
NC
C1
C2
C3
VCC
VEE
DET, to a logic low level when selected.
The loop current detector threshold value,
I
es state, is programmable with the R
resistor. R
and ground and is calculated according to:
and is not influenced by the ac signal at the
two wire side.
LTh
R
R
R
DIODES:
D
D
D
OVP:
Secondary protection (eg Power Innovations TISP
PBL1 or PBL2). The ground terminals of the
secondary protection should be connected to the
common ground on the Printed Board Assembly
with a track as short and wide as possible,
preferably a groundplane.
R
The current detector is internally filtered
LD
LC
REF
B
B2
BB
, where the loop current detector chang-
LD
R
T
=
VBAT<VEE<-5 V
500
I
LTh
R
R
RX
LD
TX
SYSTEM CONTROL
= 1N4448
= 1N4448
= 1N4448 (optional)
+5 V
INTERFACE
connects between pin PLD
R
B
C
C
VEE
VCC
R
-
+
out
CODEC/
FB
Filter
VCC
VEE
out
LD