pbl386141 ETC-unknow, pbl386141 Datasheet - Page 14

• Manufacturer Part Number: pbl386141
• Description: Pbl 386 14/1 Subscriber Line Interface Circuit
• Manufacturer: ETC-unknow

PBL 386 14/1
Analog Temperature Guard
conditions in which SLICs operate may
lead to the chip temperature limitations
being exceeded. The PBL 386 14/1 SLIC
reduces the dc line current and the
longitudinal current limit when the chip
temperature reaches approximately 145 C
and increases it again automatically when
the temperature drops.
logic low level when the temperature guard
is active.
exclusively viewed at detector output see
section Active Temperature guard.
detectors report their status through a com-
mon output, DET. The status of the detec-
tor pin, DET, is selected via the three bit
control interface C1, C2 and C3. Please
refer to section Control Inputs for a descrip-
tion of the control interface.
Loop Current Detector
the telephone is off hook and that DC
current is flowing in the loop by putting the
output pin DET, to a logic low level when
selected. The loop current detector thresh-
old value, I
tector changes state, is programmable with
the R
PLD and ground and is calculated accord-
ing to:
the ground key is pressed (active) by put-
ting the output pin DET to a logic high level
when selected. The ground key detector
circuit senses the difference between TIPX
and RINGX currents. The detector is trig-
gered when the difference exceeds the
current threshold.
14
The widely varying environmental
The detector output, DET, is forced to a
The Active state temperature guard is
Loop Monitoring Functions
The loop current, ground key and ring trip
The loop current detector indicates that
R
Ground Key Detector
The ground key detector indicates when
LD
LD
=
resistor. R
500
I
LTh
LTh
, where the loop current de-
LD
connects between pin
connecting an external network to a com-
parator in the SLIC with inputs DT and DR.
The ringing source can be balanced or
unbalanced e g superimposed on the bat-
tery voltage or ground. The unbalanced
ringing source may be applied to either the
ring lead or the tip lead with return via the
other wire. A ring relay driven by the SLIC
ring relay driver connects the ringing source
to tip and ring.
ity change at the comparator input when
the line goes off-hook. In the on-hook state
no dc current flows through the loop and
the voltage at comparator input DT is more
positive than the voltage at input DR. When
the line goes off-hook, while the ring relay
is energized, dc current flows and the com-
parator input voltage reverses polarity.
detection network. This network is applica-
ble, when the ring voltage superimposed
on the battery voltage is injected on the ring
lead of the two-wire port. The dc voltage
across sense resistor R
the ring trip comparator input DT and DR
via the filter network R
C
line on-hook (no dc current). The DET
output will report logic level high, i.e. the
detector is not tripped. When the line goes
off-hook, while ringing, a dc current will flow
through the loop including sense resistor
R
more negative than input DR. This chang-
es the output on the DET pin to logic level
low, i.e. tripped detector condition. The
system controller (or line card processor)
responds by de-energizing the ring relay
via the SLIC, i.e. ring trip.
nent at terminals DT and DR is not neces-
sary. A toggling DET output can be exam-
ined by a software routine to determine the
duty cycle. Off-hook condition is indicated
when the DET output is at logic level low for
more than half the time.
2
RT
Ring Trip Detector
Ring trip detection is accomplished by
The ring trip function is based on a polar-
Figure 14 gives an example of a ring trip
Complete filtering of the 20 Hz ac compo-
. DT is more positive than DR, with the
and will cause the input DT to become
1
, R
RT
2
is monitored by
, R
3
, R
4
, C
1
and
detector output driver designed as open
collector (npn) with a current sinking capa-
bility of min 3 mA, and a 10 k
resistor. The emitter of the drive transistor
is connected to AGND. A LED can be
connected in series with a resistor ( 1 k )
at the DET output to visualize, for example
loop status.
ring relay driver designed as open collector
(npn) with a current sinking capability of 50
mA.The emitter of the drive transistor is
connected to BGND. The relay driver has
an internal zener diode clamp to protect the
SLIC from inductive kick-back voltages. No
external clamp is needed.
Control Inputs
The PBL 386 14/1 SLIC has three digital
control inputs, C1, C2 and C3.
A decoder in the SLIC interprets the control
input condition and sets up the command-
ed operating state.
C1 to C3 are internal pull-up inputs.
Open Circuit State
In the Open Circuit State the TIPX and
RINGX line drive amplifiers as well as other
circuit blocks are powered down. This caus-
es the SLIC to present a high impedance to
the line. Power dissipation is at a minimum
and no detectors are active.
Detector Output (DET)
The PBL 386 14/1 SLIC incorporates a
Relay driver
The PBL 386 14/1 SLIC incorporates a
pull-up