psf21911 ETC-unknow, psf21911 Datasheet - Page 82

• Manufacturer Part Number: psf21911
• Description: Isdn Echocancellation Circuit Terminal Applications Iec-q
• Manufacturer: ETC-unknow

Semiconductor Group
2.6.1
Setting SWST:B1 (B2) to "1" enables the microprocessor to access B1 (B2)-channel
data between IOM-2 and the U-transceiver.
Eight registers (see table 16) handle the transfer of data from IOM-2 to the µP, from the
µP to IOM-2, from the µP to U and from U to the µP:
Table 16
Register
WB1U
RB1U
WB1I
RB1I
WB2U
RB2U
WB2I
RB2I
Every time B-channel bytes arrive, an interrupt ISTA:B1 or ISTA:B2 respectively is
created. It is cleared after the corresponding registers have been read. ISTA:B1 is
cleared after RB1U and RB1I have been read. ISTA:B2 is cleared after RB2I and RB2U
have been read. After an interrupt the data in RB1U and RB1I is stable for 125µs.
2.6.2
Setting SWST:D to "1" enables the microprocessor to access D-channel data between
the IOM-2 and the U-interface.
Four registers (see table 17) handle the transfer of data from IOM-2 to the µP, from the
µP to IOM-2, from the µP to U and from U to the µP.
Table 17
Register
DWU
DRU
DWI
DRI
Two 2-bit FIFOs of length 4 collect the incoming D-channel packets from IOM and U.
Every fourth IOM-frame they are full, an interrupt ISTA:D is generated and the contents
B-Channel Access
B1/B2-Channel Data Registers
D-Channel Access
D-channel data registers
Function
write D-channel data to U-interface
read D-channel data from U-interface
write D-channel data to IOM-2
read D-channel data from IOM-2
Function
write B1-channel data to U-interface
read B1-channel data from U-interface
write B1-channel data to IOM-2
read B1-channel data from IOM-2
write B2-channel data to U-interface
read B2-channel data from U-interface
write B2-channel data to IOM-2
read B2-channel data from IOM-2
82
Access to IOM-2 Channels
PSB 21911
PSF 21911
11.97