lm4921itlx National Semiconductor Corporation, lm4921itlx Datasheet - Page 11

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lm4921itlx

Manufacturer Part Number
lm4921itlx
Description
Low Voltage I2s 16-bit Stereo Dac With Stereo Headphone Power Amplifiers And Volume Control
Manufacturer
National Semiconductor Corporation
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LM4921ITLX
Manufacturer:
NS/国半
Quantity:
20 000
Application Information
SPI OPERATIONAL DESCRIPTION
The serial data bits are organized into a field which contains 16 bits of data defined by TABLE 1. Bits 1 & 2 determine the output
mode of the LM4921 as shown in TABLE 2. Bits 7 through 11 determine the volume level setting as illustrated by TABLE 3. Bit 12
sets the Bypass capacitor charging time.
MODE CONTROL
Sets the modes as outlined in Table 2.
Shutdown turns off the part completely for maximum power savings. The Standby mode turns off the clock but still consumes more
power than the shutdown mode. However, coming out of standby mode allows the part to turn back on faster than from shutdown.
In Mute mode the clocks remain on which uses more power but allows faster recovery and the ability to supply clock signals to
other devices which is important when the part is used in master mode. Active mode turns the part on for normal operation.
MASTER/SLAVE SELECT
Allows the part to act as a master and supply the clock for the
rest of the system or be a slave to the system clock.
RESOLUTION SET
Sets the resolution to be either 16 or 32 bits of stereo audio
information. For most applications this will be set at 16 bits.
BIT #
0 (LSB)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15 (MSB)
Output Mode #
0
1
2
3
Default Val
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Table 2. Output Mode Selection (Bits 1 & 2 above)
BIT 2
0
0
1
1
Table 1. Bit Allocation
Function
RESET_B
MODE CONTROL
MASTER/SLAVE
RESOLUTION
RESERVED
ZERO CROSSING SET
VOLUME CONTROL
BYP CHARGE RATE
RESERVED
RESERVED
RESERVED
BIT 1
0
1
0
1
11
ZERO CROSSING DETECT SET
This pin turns on the zero crossing detection circuit. With this
circuit enabled the part will not allow a volume step change,
or shutdown mode, or standby mode to occur until the audio
input signal passes through zero. This pin should be set to on
for most applications.
Description
RESET_B = 0, Resets the DAC
Must be high for the part to run.
See Table 2
0 = SLAVE, 1 = MASTER
0 = 16 bit, 1 = 32 bit
Should always be set to '1'
0 = ZXD ENABLE, 1 = ZXD DISABLE
See Table 3 - Volume Control Settings
0 = 1X, 1 = 2X
Should always be set to '0'
MODE
SD
STANDBY
MUTE
ACTIVE
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