lm49370rl National Semiconductor Corporation, lm49370rl Datasheet - Page 38

• Manufacturer Part Number: lm49370rl
• Description: Audio Sub-system With An Ultra Low Emi, Spread Spectrum, Class D Loudspeaker Amplifier, A Dual-mode Stereo Headphone Amplifier, And A Dedicated Pcm Interface For Bluetooth Transceivers
• Manufacturer: National Semiconductor Corporation

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Bits
Bits
3:0
4:0
12.18 SIDETONE ATTENUATION REGISTER
This register is used to control the analog sidetone attenuation. (Note 21)
Note 21: An active SIDETONE path to an audio output may result in the microphone DC blocking caps causing audio pops under the following situations:
1) Switching between internal and external microphone operation while in chip modes '10' or '11'.
2) Toggling in and out of powerdown/standby modes.
3) Toggling between chip modes '10' and '11' whenever external microphone operation is selected.
4) The insertion/removal of a headset while in chip modes '10' or '11' whenever external microphone operation is selected.
To avoid potential pop noises, it is recommended to set SIDETONE_ATTEN to '0000' until DC points have stabilized whenever the SIDETONE path is used.
12.19 CP_INPUT CONFIGURATION REGISTER
This register is used to control the differential cell phone input.
5
SIDETONE_
CPI_LEVEL
CPI_MUTE
ATTEN
Field
Field
This programs the attenuation applied to the microphone preamp output to produce a sidetone signal.
This programs the gain/attenuation applied to the cell phone input.
If set, the CPI input is muted at source.
SIDETONE_ATTEN
00100 to 11100
0101
1011
CPI_LEVEL
TABLE 20. SIDETONE (0x0Dh)
TABLE 21. CP_INPUT (0x0Eh)
00000
00001
00010
00011
11101
11110
11111
0000
0001
0010
0011
0100
2
2
to 1010
to 1111
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
38
Description
Description
−28.5 dB to +7.5 dB
−18 dB to −3 dB
Attenuation
−34.5 dB
−31.5 dB
+10.5 dB
−30 dB
−27 dB
−24 dB
−21 dB
−33 dB
−30 dB
+12 dB
+9 dB
Level
0 dB
-Inf