zxcw8100s28 ETC-unknow, zxcw8100s28 Datasheet
zxcw8100s28
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zxcw8100s28 Summary of contents
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... Use of Technology” 32 BIT STEREO DIRECT DRIVE DIGITAL AUDIO AMPLIFIER SUMMARY The ZXCW8100S28 is part of the Acoustar™ range of new generation digital audio power devices from Zetex. It has a level of performance not offered by any other solution and with minimal components forms a complete audio interface from digital audio data to the loudspeaker ...
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... ZXCW8100S28 DESCRIPTION The ZXCW8100 is part of a new generation of stereo digital audio power amplifier devices. The device offers a move forward to a new level of performance not offered by another solution. The ZXCW8100 operates in direct drive mode and can be selected to be with or without dead time. ...
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... All clocks & data static Conditions OUT OH(min OUT OUT(max Conditions OUT OH(min OUT OUT(max ZXCW8100S28 Min Typ Max Unit 3 3.3 3 Min Typ Max Unit 10.5 A 112 144 mA 380 475 mW Min Typ Max Unit ...
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... ZXCW8100S28 DIGITAL INPUT WITH ACTIVE PULL-DOWN CHARACTERISTICS Symbol Parameter V High level input voltage IH V Low level input voltage IL I Low level Input current IL I High level Input current IH I Input capacitance C DIGITAL OUTPUT CHARACTERISTICS Symbol Parameter V High level output voltage OH V Low level output voltage ...
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... SPI-DA Data hold time spidh t time to valid SPI-DA data out spidov t SPI-EN hold time spies t SPI-EN hold time spieh t SPI-EN minimum high time spiemh 1 Note: M-CK = Master Clock Cycles. ISSUE 3 - NOVEMBER 2003 ZXCW8100S28 Conditions Min 0.5 0.1 0.7 0.1 3 Conditions Min 0.5 0.1 Load capacitance ( 50pf L 0.7 0 Typ ...
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... ZXCW8100S28 SWITCHING CHARACTERISTICS: AUDIO INPUT DATA Symbol Parameter B BIT-CK clock frequency CK t S-DATA set-up time sds t S-DATA hold time sph t WORD-CLK set-up time wcks t WORD-CLK hold time wckh 1 Note: M-CK = Master Clock Cycles. MASTER CLOCK TO PWM OUTPUT CHARACTERISTICS Symbol Parameter t M-CK to PWM output delay ...
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... ZXCW8100S28 12kH zB oost 8kH zB oost Flat 4kH zB oost R esponse 4kH zC ut 8kH zC ut 12kH zC ut 100 1k 10k 20k F requency (H z) TrebleR esponse 400 600 800 1000 F requency (kH z) ...
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... ZXCW8100S28 PINOUT DIAGRAM PIN DESCRIPTIONS Pin Name Type 1 SPI-EN LVTTL IP 2 SPI-DA LVTTL I/O 3 SPI-CK LVTTL IP 4 CSLO LVTTL IP+PU Connect to logic Gnd 5 CSL1 LVTTL IP+PU Connect to logic Gnd 6 VCC-LOGIC 7 GND-LOGIC 8 WORD-CK LVTTL IP 9 BIT-CK LVTTL IP 10 S-DATA LVTTL IP 11 MUTE LVTTL IP+PU Mute enable, active low ...
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... Speed mode The SPI interface is bi-directional such that the appropriate programmed configuration and data can be read back if required. ISSUE 3 - NOVEMBER 2003 ZXCW8100S28 Format converter The format converter ensures the device is compatible with all the normal digital input standards. The standards supported are: ...
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... ZXCW8100S28 Bass The bass control can be set to a selection of corner frequencies: 50Hz 100Hz 1200Hz These corner frequencies are stated for a nominal 44.1kHz sampling frequency. If the sampling frequency is altered then the corner frequency is automatically adjusted. Once selected then the bass control can be set to either cut or boost with gain from 0dB up to 15dB in 1dB steps ...
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... It is recommended to run the device without dead time. ISSUE 3 - NOVEMBER 2003 ZXCW8100S28 Full details about the use of these modes is available in the associated application document. Contact your nearest Zetex office for full details. ...
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... ZXCW8100S28 PIN FUNCTIONAL DESCRIPTIONS SPI interface Pins SPI-EN, SPI-DA, SPI-CKform the SPIinterface. The enable, SPI-EN, is active low. Data is transmitted on SPI- bit word, there are 8 control bits and 64 data bits, SPI-CK provides the clock for the SPI interface. The function of the control and data bits is detailed in the Register Description section ...
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... The audio input utilizes three pins, WORD-CK, BIT-CK and S-DATA. The diagrams below indicate the appropriate timing diagrams for the 4 possible input formats. Left Justify 24 bit Left Justify 32 bit 2 24 bit I S Compatible Right Justify bit ISSUE 3 - NOVEMBER 2003 ZXCW8100S28 ...
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... ZXCW8100S28 Mute Mute is enabled with the MUTE pin. Mute is active low. Master clock The system master clock is applied to pin M-CK Output drive Output drive is provided on 8 pins, 4 each for left and right. For each channel the pins are OP1 to OP4 then OP1 and OP2 as a pair drive the gates & P channel MOSFET pair through a gate drive buffer that includes dead time control ...
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... ISSUE 3 - NOVEMBER 2003 ZXCW8100S28 Comments/Example vl8.............vl0 011111110 is 0dB 100110000 is +25 dB 001000001 is -94.5dB 001000000 = soft mute 011111010 is default power up See volume code tables vr8.............vr0 011111110 is 0dB 100110000 is +25 dB 001000001 is -94.5dB 001000000 = soft mute ...
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... ZXCW8100S28 SPI bi-directional interface register (cont) Bit No. Function Bit Identifier 32 50/15 s standard de0 33 de-emphasis de1 34 novaload novl 35 novaload mode novlm 36 dc dither dcadd 37 limiter lar0 38 attack rate lar1 39 lar2 40 limiter lrr0 41 release rate lrr1 42 lrr2 43 lrr3 44 digital interface dif0 45 dif1 46 ATAPI mix ...
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... ISSUE 3 - NOVEMBER 2003 ZXCW8100S28 Treble The treble register increments digitally in steps of 1dB. The range is from 0dB to +/-15dB depending on whether the treble control is set to cut or boost (bit25). The bit numbers for the treble level control are 26to 29. Bit25: boost=1, cut=0 ...
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... ZXCW8100S28 DC Dither A function is provided to help eliminate small signal digital zero point switching distortion by the addition of a small DCvoltage. This is intended to move the signal away from the DACzero to prevent the distortion that is sometimes discernible when the DAC switches around zero. DC dither would be required when using the recommended HPWM mode ...
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... The resultant operating modes are shown in the following table: hspd hpwm Operating mode 0 0 RPWM at 500kHz 0 1 HPWM at 1MHz 1 0 RPWM at 1MHz 1 1 HPWM at 2MHz 1 Note: recommended mode of operation ISSUE 3 - NOVEMBER 2003 1 = high speed 1 = HPWM 1 19 ZXCW8100S28 ...
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... ZXCW8100S28 TYPICAL CONNECTION DIAGRAM The following shows a typical connection diagram for the output circuit of one channel of the ZXCW8100 device. For dedicated applications notes please contact your nearest Zetex office. TYPICAL PERFORMANCE CHARACTERISTICS Parameter Conditions THD+N HPWM mode at 1MHz. 1W Dynamic range Noise floor ...
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... ZXCW8100S28 PACKAGE OUTLINE ORDERING INFORMATION DEVICE PART MARKING ZXCW8100S28 Zetex Acoustar™ ZXCW8100 © Zetex plc 2003 Europe Zetex plc Zetex GmbH Fields New Road Streitfeldstraße 19 Chadderton D-81673 München Oldham, OL9 8NP United Kingdom Germany Telephone (44) 161 622 4444 Telefon: (49 ...