adl5386 Analog Devices, Inc., adl5386 Datasheet - Page 21

• Manufacturer Part Number: adl5386
• Description: 50 Mhz To 2200 Mhz Quadrature Modulator With Integrated Detector And Vva
• Manufacturer: Analog Devices, Inc.

BASIC CONNECTIONS
OPEN-LOOP POWER CONTROL MODE
Figure 41 shows the basic connections for operating the ADL5386
when the voltage variable attenuator (VVA) is driven from an
external voltage source and not from the built-in AGC circuit.
In this mode, the inputs to the RF detector should be both
ac-coupled to ground. The TADJ pin is tied to the supply,
disabling the unused detector and reducing the current
consumption by approximately 15 mA. The IQ modulator
is enabled by pulling the ENBL pin high.
The output of the modulator is ac-coupled to the input of
the VVA (Pin ATTI). The VVA is bidirectional; therefore, the
modulator can also be configured to drive ATTO and to take
the final output at ATTI.
The attenuation of the VVA is controlled by the voltages on
Pin VREF and Pin VDET/VCTL. VREF should be tied to
a low impedance external voltage of 2 V. This voltage can be
conveniently derived from the supply voltage using a pair of
resistors, but this voltage must then be buffered with an op
amp to prevent bias current related voltage drops.
With VREF set to 2 V, a variable voltage between 0 V and 2 V
on VDET/VCTL sets the attenuation. Maximum attenuation is
achieved when V
achieved when V
LO
QN
QP
IP
IN
1000pF
1000pF
C3
VDET
VDET
C4
/V
/V
QBBN
QBBP
IBBN
IBBP
LOIP
VCTL
VCTL
LOIN
VPOS
= 0 V, and minimum attenuation is
= 2 V.
0.1µF
30
25
26
33
34
29
C1
38
TEMPERATURE
TEMP
+5V
VP
37
SENSOR
TEMP
QUADRATURE
8
36
SPLITTER
PHASE
35
Figure 41. Basic Connections for Open-Loop Power Control Mode
C2
0.1µF
0.1µF
VPOS
INLO
C5
1
VPOS
0.1µF
C14
2
23
INHI
C6
0.1µF
22
DETECTOR
TADJ
21
LOG
Rev. 0 | Page 21 of 36
IQ MOD
BIAS
+5V
VP
24
39
C13
0.1µF
ENBL
ADL5386
5
11
MODOUT
13
Figure 40 shows a plot of P
to the VDET/VCTL pin) at 350 MHz when the modulator is
driven by 1 V p-p sine and cosine signals on its baseband inputs
and a 2 × LO of 700 MHz.
In this mode, the detector cannot be used in any kind of
standalone mode because its output pin (VDET/VCTL) is
used as an input.
Figure 40. P
15
10
16 18
1000pF
C19
–10
–15
–20
–25
–30
–35
–5
5
0
19 27
12
0
OUT
ATTI
vs. V
15dB
0.2
28
4x
VDET
31
I
0.4
/V
32
NC
9
V
VCTL
40
COMM
0.6
17
14
20
at 350 MHz for Open-Loop Power Control Mode
6
4
7
3
VSET
VREF
VDET/VCTL
CLPF
ATTCM
ATTCM
ATTO
0.1µF
OUT
V
0.8
C7
VDET
vs. the control voltage (applied
/V
1.0
C11 1000pF
C10
C12
VCTL
2V
ATTENUATION
CONTROL
0V TO 2V
1000pF
1000pF
1.2
(V)
1.4
1.6
ATTOUT
ADL5386
1.8
2.0