adl5304 Analog Devices, Inc., adl5304 Datasheet - Page 21

• Manufacturer Part Number: adl5304
• Description: High Speed, 200 Db Range, Logarithmic Converter
• Manufacturer: Analog Devices, Inc.

Data Sheet
Capacitor, C1D, effectively reduces the bandwidth of the
denominator input stage. A few picofarads of capacitance
(<5 pF) reduce the bandwidth significantly for currents below
approximately 1 μA, though whereas 1 nF to 10 nF are normally
enough to reduce the bandwidth up to the maximum 10 mA of
input current. When measurement speed is of primary importance,
it is better to add filtering after the FET amp outputs, in which
case, C2D, RD, and C3D are the best locations. The resistor in this
case should not be much larger than 1 kΩ because there is a
bias current that is approximately 35 μA that flows from the
temperature compensation block into each of the VDEN and
VNUM pins. Inserting a resistor, as shown in Figure 48, lifts up
the voltages at the INNM and/or INDN pins and potentially causes
headroom problems in the temperature compensation block.
When I
is recommended that C1D is zero, C2D is a 0.1 μF ceramic
decoupling capacitor, RD is a short, and C3D is not placed.
Adding a capacitor, CFB, adds additional filtering at the buffer
output. This capacitor also helps to optimize the pulse response
by placing a zero across the feedback resistor (2.5 kΩ in the
default configuration). A good value to start with is 22 pF, this
introduces a zero at 2.9 MHz that can improve the pulse responses
for input currents above approximately 100 μA.
Photodiode Bias
The
transistor, Q3, connected in parallel with Q1 (see Figure 49),
samples 1/10
multiplied by a factor of 11 to give an effective output current at
the IMON pin of 1.1 times I
I
R
parasitic series resistance of the photodiode. This ensures that
the actual junction of the photodiode is biased as close as
possible to 0 V to minimize dark current. Capacitor, CMON,
provides potential filtering and dynamic currents during fast
transients. The value for best bias response depends on the
photodiode used and should be determined experimentally.
Nominally, CMON = 0.
If the adaptive bias is not used, the IMON pin must be connected
to ground. It is easy to provide a 0.5 V reverse bias across the
diode by using the 2VLT reference and connecting it to the
cathode. Because the
close to 1.500 V, the trimmed 2.000 V ensures a precise 0.5 V
reverse bias for the PD.
NUM
MNTR
ADL5304
, the additional current has to flow in an external resistor,
, equal to 10 × R
DEN
is used as the reference, as is normally done, then it
th
provides for adaptive photodiode bias. A monitoring
the input current, I
ADL5304
S
, where R
NUM
. Because the photodiode produces
forces the voltage at INUM very
S
is the value of the internal
NUM
. This sampled current is
Rev. 0 | Page 21 of 32
One example of dual-supply operation is shown in Figure 50, where
the 2.000 V (the 2VLT pin) reference ensures a precisely controlled,
reverse bias across the PD. The user can use other reverse bias
voltages but needs to provide them separately. Note that when the
VSMx pins are grounded, the DCBI and INPS pins must also be
grounded.
Figure 50. PD Bias with V
FROM 2.0V
V
REF
PD
PD
SHIELD
SHIELD
R
SHIELD
SHIELD
MNTR
CMON
Figure 49. Adaptive Photodiode Bias
VSM3
VSM4
VSM3
VSM4
VSM1
VSM2
VSM1
VSM2
INUM
INUM
IDEN
IDEN
IREF
IREF
2
3
4
5
6
7
8
2
3
4
5
6
7
8
SUM
100nA
100nA
at Ground and Using 2.000 V
1.5V
FROM 1.5V VREF
MONITOR AND
MONITOR AND
(1.1× I
30
30
(1.1× I
1.5V
PD BIAS
PD BIAS
IMON
IMON
NUM
NUM
Q1
Q2
Q1
Q2
)
)
VNUM
VDEN
VNUM
VDEN
Q3
Q3
32
32
9
9
ADL5304