lt5521 Linear Technology Corporation, lt5521 Datasheet - Page 10

• Manufacturer Part Number: lt5521
• Description: Very High Linearity Active Mixer
• Manufacturer: Linear Technology Corporation

APPLICATIO S I FOR ATIO
50
LT5521
The LT5521 is a high linearity double-balanced active
mixer. The chip consists of a double-balanced mixer core,
a high performance LO buffer and associated bias and
enable circuitry. The chip is designed to operate with a
supply voltage ranging from 3.15V to 5.25V.
Table 2. Port Impedance
Signal Input Interface
Figure 2 shows the signal inputs of the LT5521. The signal
input pins are connected to the common emitter nodes of
the mixer quad differential pairs. The real part of the
differential IN
current is set by external resistors R1 and R7. Setting their
values at 110 , the nominal DC voltage at the inputs is
2.2V with V
for a matched input at 250MHz.
10
IF
IN
FREQUENCY
(MHz)
1000
1500
2000
2300
3200
3500
4000
100
300
600
50
C2
Figure 2. Signal Input with External Matching
CC
Z14
Z3
C6
1nF
+
= 5V. Figure 3 shows the input return loss
/IN
DIFFERENTIAL
22.4 + j125.1
15.2 + j16.8
14.5 + j28.1
20.5 + j42.3
48.2 + j26.8
18.2 + j29.4
19.8 + j0.7
20.1 + j2.0
18.2 + j5.3
–
INPUT
U
impedance is 20 . The mixer core
1:1
T1
U
C13
DIFFERENTIAL
215.0 – j124.5
109.5 – j158.0
Z1
OPT
Z7
OPT
282.3 – j20.8
262.3 – j55.1
231.4 – j67.0
R1
R7
282.2 – j8.4
52.9 – j92.1
61.6 – j74.2
14.2 – j27.5
42.8 – j16.0
27.9 – j4.4
OUTPUT
2
3
W
LT5521
V
IN
IN
CC
+
–
SINGLE-ENDED
44.6 + j14.0
42.4 + j17.9
38.6 + j22.8
49.9 + j0.1
49.8 + j0.3
49.2 + j0.9
47.7 + j2.0
45.3 + j2.8
43.3 + j2.8
43.0 + j3.3
43.4 + j4.6
U
LO
5521 F02
For input frequencies above 100MHz, a broadband im-
pedance matching tranformer with a 1:1 impedance ratio
is recommended. Table 3 provides the component values
necessary to match various IF frequencies using the M/A-
COM CT0010 transformer (T1, Figure 1).
Table 3. Component Values for Input Matching Using the
M/A-COM CT0010
Below 100MHz, the Mini-Circuits TCM2-1T or the Pulse
CX2045 are better choices for a wider input match. This
configuration is shown in Figure 4. The series 1nF capaci-
tors maintain differential symmetry while providing DC
isolation between the inputs. This helps to improve LO
suppression.
Shunt capacitor C13 (Figure 2) is an optional capacitor
across the input pins that significantly improves LO sup-
pression. Although this capacitor is optional, it is impor-
tant to regulate LO suppression, mitigating part-to-part
variation. This capacitor should be optimized depending
120MHz
150MHz
170MHz
250MHz
300MHz
435MHz
520MHz
44MHz
95MHz
IF
–10
–15
–20
–25
–30
–40
–35
–5
0
100
Figure 3. IF Input Return Loss
150
1000pF
1000pF
820pF
330pF
330pF
8.2pF
6.8pF
82pF
15pF
C2
200
FREQUENCY (MHz)
250
300
Unused
120nH
3.9pF
0.5pF
33pF
27pF
22pF
18pF
10pF
Z14
350
5521 F03
400
150pF
6.8nH
27nH
18nH
10nH
0
0
0
0
Z3
5521f