tda6610-5 Infineon Technologies Corporation, tda6610-5 Datasheet

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tda6610-5

Manufacturer Part Number
tda6610-5
Description
Tv-stereo Processor
Manufacturer
Infineon Technologies Corporation
Datasheet

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Part Number:
TDA6610-5
Quantity:
420
TV-Stereo Processor
Features
Type
TDA 6610-5
General
The TDA 6610-5 represents a complete TV-stereo sound system controlled via the I
is divided into three functional blocks:
1. Stereo Sound Processing with High Quality (exceeds DIN 45500; suitable for NICAM and
AII functions are I
Suitable for multistandard including NICAM SCART-
interface
Independent headphones output high signal noise ratio
Extremely low total harmonic distortion
High security of detection of the stereo decoder part
because of the digital interference suppression and the
very narrow bandwidth
CD)
a) Matrix for G-standard
b) Additional single-channel AF-input (for e.g. AF-signal according to L-standard)
c) Stereo SCART-interface is in accordance with FTZ-official specification
d) Stereo loudspeaker signal section with Ch1/Ch2 switch, treble/bass control, quasi-stereo/
e) Signal section with Ch1/Ch2 switch and volume control for stereo headphones
stereo base width control and separate left/right loudspeaker volume control
2
C Bus controlled
Ordering Code
Q67000-A5126
39
Package
P-DIP-28-3
P-DIP-28-3
TDA 6610-5
2
C Bus. The IC
Bipolar IC
06.94

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tda6610-5 Summary of contents

Page 1

TV-Stereo Processor Features AII functions are Bus controlled Suitable for multistandard including NICAM SCART- interface Independent headphones output high signal noise ratio Extremely low total harmonic distortion High security of detection of the stereo decoder part because ...

Page 2

TDA 6610-5 2. TV-Sound Identification Signal Decoder Consisting of: a) Active pilot signal filter b) Phase-independent rectifier with very narrow bandwidth for evaluation of the identification signal c) Digital integrator to reduce interference d) Multiplexer for cyclical switch over between ...

Page 3

TDA 6610-5 Pin Functions Pin No. Function 1 AF-input mono, left, sound 1 2 Bias for AF-unit 3 AF-input right, sound 2 4 54-kHz input 5 54-kHz filter 6 AF-input (L-standard) 7 AF-input SCART left (sound 1) 8 AF-input SCART ...

Page 4

TDA 6610-5 Block Diagram Semiconductor Group 42 ...

Page 5

TDA 6610-5 Circuit Description Signal Section The audio signal processing in the matrix and the switch-over for multichannel TV-sound signals according to the two-carrier system used in Germany takes place in the matrix and switching sections. In addition to the ...

Page 6

TDA 6610-5 Control Section All functions are controlled via I stored in a latch block. The telegram structure is: start condition - chip address - any number of data bytes - stop condition The following conditions apply to the data ...

Page 7

TDA 6610-5 Subaddress Bytes Loudspeaker volume left Loudspeaker volume right Headphone volume Treble/bass Switch byte I Switch byte II Setting Bytes a) Loudspeaker Volume Left / Right Maximum volume Max – 1 step Max – 15 steps Max – 55 ...

Page 8

TDA 6610-5 c) Treble / Bass Linear Max. treble, lin. bass Max. treble, lin. bass Min. treble, lin. bass Min. treble, lin. bass Lin. treble, max. bass Lin. treble, max. bass Lin. treble, max. bass Lin. treble, min. bass Lin. ...

Page 9

TDA 6610-5 d) Switch Byte I MSB • MUTE I MUTE II Ch1/Ch2 MUTE All AF-outputs are muted (loudspeakers, headphones, SCART); power ON MUTE All AF-outputs ON MUTE Loudspeaker outputs muted; ...

Page 10

TDA 6610-5 e) Switch Byte II MSB • • MPX0 MPX1 Quasi-st MPX0 MPX 1 MPX period MPX-period = 2 s signifies: Identification (ID) signal decoder searches 1 ...

Page 11

TDA 6610-5 Priority List of Setting Bits 1. MUTE I 2. MUTE II (only with regard to the loudspeaker outputs) 3. SCART 4. Standard L 5. Bypass 6. Matrix Talk Mode MS • • ...

Page 12

TDA 6610-5 Absolute Maximum Ratings all voltages relatives to A Parameter Supply voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage Max. DC-voltage ...

Page 13

TDA 6610-5 Characteristics accordance with test circuit Bus present: start - 84 - 01 ...

Page 14

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Gain V 9-1 V Gain 10-3 V Gain 9-3 V Gain 10-3 V Gain 9-1 V Gain ...

Page 15

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Step width Vol Step width Vol Step width Vol 19 ...

Page 16

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Cross talk input interf attenuation switch / Output rms Attenuation MUTE 1-16 Attenuation MUTE 1-16 Attenuation MUTE ...

Page 17

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Max. input voltage Max. input voltage 3 V Max. input voltage 1 Max. input ...

Page 18

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Antiphase V 16-15 Cross talk atten. Base width Base width phase 16-15 Base width phase 15-16 Phase ...

Page 19

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Unweighted signal N20 to-noise ratio Unweighted signal N19 to-noise ratio Unweighted signal- S ...

Page 20

TDA 6610-5 Characteristics (cont’ accordance with test circuit Parameter Symbol Design-Related Data R Input resistance 7 R Input resistance 8 R Input resistance 6 Input resistance R ...

Page 21

TDA 6610-5 Characteristics (cont’ Parameter Symbol ID-Signal Decoder Gain V Filter OP-amp 5 V Max. input voltage 5 VCO voltage PLL V 27 VCO voltage PLL ...

Page 22

TDA 6610-5 Characteristics (cont’ Parameter Symbol Mono threshold Mono threshold – V Mono threshold 26 Mono threshold – Detection response det t Detection response ...

Page 23

TDA 6610-5 Characteristics Parameter 2 C Bus (SCL, SDA) I SCL, SDA edges Rise time Fall time Shift register clock pulse SCL Frequency H-pulse width L-pulse width Start Setup ...

Page 24

TDA 6610-5 Test Circuit 1 Semiconductor Group 62 ...

Page 25

TDA 6610-5 Test Circuit 2 Semiconductor Group 63 ...

Page 26

TDA 6610-5 Test Circuit 3 Semiconductor Group 64 ...

Page 27

TDA 6610-5 Application Circuit 1 Semiconductor Group 65 ...

Page 28

TDA 6610-5 Application Circuit 2 Semiconductor Group 66 ...

Page 29

TDA 6610 Bus Timing Diagram t Setup time (start) SUSTA t Hold time (start) HDSTA t H-pulse width (clock) HIGH t L-pulse width (clock) LOW t Setup time (data transfer) SUDAT t Hold time (data transfer) HDDAT ...

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