clc453 National Semiconductor Corporation, clc453 Datasheet - Page 9

• Manufacturer Part Number: clc453
• Description: Single Supply, Low-power, High Output, Programmable Buffer
• Manufacturer: National Semiconductor Corporation

Bandwidth vs. Output Amplitude
The bandwidth of the CLC453 is at a maximum for
output voltages near 1V
for smaller and larger output amplitudes. Refer to the
Frequency Response vs. V
Load Termination
The CLC453 can source and sink near equal amounts of
current. For optimum performance, the load should be
tied to V
Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC453 will
improve stability and settling performance. The
Frequency Response vs. C
vs. C
recommended series resistance value for optimum
flatness at various capacitive loads.
Transmission Line Matching
One method for matching the characteristic impedance
(Z
appropriate resistor at the input or output of the amplifier.
Figure 9: Dual Supply, A
o
Figure 8: Dual Supply, A
) of a transmission line or cable is to place the
V
V
in
in
L
plots, in the typical performance section, give the
cm
R
R
.
t
V
t
V
EE
EE
2
3
3
1
4
1
2
4
6.8 F
0.1 F
6.8 F
0.1 F
+
+
1k
1k
CLC453
CLC453
pp
1k
1k
. The bandwidth decreases
v
o
v
L
= +1V/V Configuration
plots.
= +2V/V Configuration
and Recommended R
8
7
6
5
6
8
7
5
V
V
CC
CC
V
V
6.8 F
0.1 F
o
6.8 F
0.1 F
o
+
+
s
9
Figure 10 shows typical inverting and non-inverting
circuit configurations for matching transmission lines.
Non-inverting gain applications:
Inverting gain applications:
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is needed.
Use C
greater frequency range. C
of the amplifier’s output impedance with frequency.
Power Dissipation
Follow these steps to determine the power consumption
of the CLC453:
The maximum power that the DIP, SOIC, and SOT
packages can dissipate at a given temperature is
illustrated in Figure 11. The power derating curve for
any CLC453 package can be derived by utilizing the
following equation:
where
T
V
V
1
2
JA
amb
+
+
-
-
= Thermal resistance, from junction to ambient,
= Ambient temperature (°C)
R
R
for a given package (°C/W)
4
1
6
Connect pin 2 as indicated in the table in the
Closed Loop Gain Selection section.
Make R
Use R
loading caused by the transmission line,
or by parasitics.
Connect R
Make the resistors R
Make R
Figure 10: Transmission Line Matching
1. Calculate the quiescent (no-load) power:
2. Calculate the RMS power at the output stage:
3. Calculate the total RMS power:
to match the output transmission line over a
P
P
are the RMS voltage and current across the
external load.
P
Z
Z
amp
o
t
0
0
= P
3
= (V
1
5
to isolate the amplifier from reactive
, R
= I
II R
amp
R
R
3
CC
5
2
R
2
CC
directly to ground.
3
, R
g
+ P
- V
(175
= Z
(V
6
, and R
load
CC
3
o
1
2
4
o
6
.
1k
) (I
CLC453
JA
compensates for the increase
- V
4
, R
T
load
amb
1k
EE
7
6
equal to Z
, and R
)
), where V
)
8
7
6
5
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7
C
R
6
6
equal to Z
o
load
.
Z
0
and I
o
load
.
R
7
V
o