clc451 National Semiconductor Corporation, clc451 Datasheet - Page 10
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clc451
Manufacturer Part Number
clc451
Description
Single Supply, Low-power, High Output, Programmable Buffer
Manufacturer
National Semiconductor Corporation
Datasheet
1.CLC451.pdf
(12 pages)
Layout Considerations
A proper printed circuit layout is essential for achieving
high frequency performance. Comlinear provides
evaluation boards for the CLC451 (CLC730013-DIP,
CLC730027-SOIC, CLC730068-SOT) and suggests their
use as a guide for high frequency layout and as an aid for
device testing and characterization.
General layout and supply bypassing play major roles in
high frequency performance. Follow the steps below as
a basis for high frequency layout:
Evaluation Board Information
Data sheets are available for the CLC730013/
CLC730027 and CLC730068 evaluation boards. The
evaluation board data sheets provide:
The CLC730013/CLC730027 data sheet also contains
tables of recommended components to evaluate several
of Comlinear’s high speed amplifiers. This table for the
CLC451 is illustrated below.
board data sheet for schematics and further information.
Components Needed to Evaluate the
CLC451 on the Evaluation Board:
http://www.national.com
Include 6.8 F tantalum and 0.1 F ceramic
capacitors on both supplies.
Place the 6.8 F capacitors within 0.75 inches
of the power pins.
Place the 0.1 F capacitors less than 0.1 inches
from the power pins.
Remove the ground plane under and around the
part, especially near the input and output pins to
reduce parasitic capacitance.
Minimize all trace lengths to reduce series
inductances.
Use flush-mount printed circuit board pins for
prototyping, never use high profile DIP sockets.
Evaluation board schematics
Evaluation board layouts
General information about the boards
R
Operation section of the evaluation board data
sheet for details)
in
, R
Figure 11: Power Derating Curve
1.0
0.8
0.6
0.4
0.2
0
out
-40 -20
- Typically 50
0
Ambient Temperature ( C)
AJE
SOT
20 40 60 80 100 120
AJP
(Refer to the Basic
Refer to the evaluation
140 160
180
10
Components not used:
The evaluation boards are designed to accommodate
dual supplies. The boards can be modified to provide
single supply operation. For best performance; 1) do
not connect the unused supply, 2) ground the unused
supply pin.
Special Evaluation Board
Considerations for the CLC451
To optimize off-isolation of the CLC451, cut the R
both the CLC730013 and the CLC730027 evaluation
boards. This cut minimizes capacitive feedthrough
between the input and the output. Figure 12 shows where
to cut both evaluation boards for improved off-isolation.
SPICE Models
SPICE models provide a means to evaluate amplifier
designs. Free SPICE models are available for
Comlinear’s monolithic amplifiers that:
The readme file that accompanies the diskette lists
released models, and provides a list of modeled parame-
ters. The application note OA-18, Simulation SPICE
Models for Comlinear’s Op Amps, contains schematics
and a reproduction of the readme file.
Single Supply Cable Driver
The typical application shown on the front page shows
the CLC451 driving 10m of 75
CLC451 is set for a gain of +2V/V to compensate for the
divide-by-two voltage drop at V
730013
REV C
R
tions (Select R
= R
C
C
C
R
Support Berkeley SPICE 2G and its many derivatives
Reproduce typical DC, AC, Transient, and Noise
performance
Support room temperature simulations
Figure 12: Evaluation Board Changes
t
1
3
5
1
, C
, C
, C
- Optional resistor for inverting gain configura-
thru R
g
Application Circuits
|| R
Cut trace here
2
4
6
, C
- 0.1 F ceramic capacitors
- 6.8 F tantalum capacitors
t
)
7
8
, C
8
t
to yield desired input impedance
Cut trace here
-V
o
cc
.
GND
R5
+
+V
cc
coaxial cable. The
C7
C8
C5
IN
C1
C6
RF
C2
A N a t i o n a l S e m i c o n d u c t o r C o m p a n y
Comlinear
( 3 0 3 ) 2 2 6 - 0 5 0 0
R8
OUT
f
+
trace on