clc423 National Semiconductor Corporation, clc423 Datasheet - Page 5

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clc423

Manufacturer Part Number
clc423
Description
Comlinear Clc423 94mhz, Single Supply Voltage Feedback Op Amp
Manufacturer
National Semiconductor Corporation
Datasheet
Load Termination
Since the CLC423 design has been optimized for Single
Supply Operation, it is more capable of sourcing rather
than sinking current. For optimum performance, the load
should be tied to V
output always sources current.
Output Overdrive Recovery
When the output range of an amplifier is exceeded, time
is required for the amplifier to recover from this over
driven condition.
recovery of the CLC423 when the output is overdriven.
An input was applied in an attempt to drive the output to
twice the supply rails (2
output limits. An inverting gain topolgy was used, see
Figure 2.
25ns on the rising edge and within 10ns on the falling
edge.
Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC423
will improve stability and settling performance.
Frequency Response vs. C
performance section, gives the recommended series
resistance value for optimum flatness at various
capacitive loads.
Transmission Line Matching
One method for matching the characteristic impedance
(Z
appropriate resistor at the input or output of the amplifier.
Figure 6 shows typical inverting and non-inverting circuit
configurations for matching transmission lines.
V
V
1
2
o
) of a transmission line or cable is to place the
+
+
-
-
R
R
1
4
Figure 6: Transmission Line Matching
As indicated, the CLC423 recovers within
Figure 5: Overdrive Recovery
Z
Z
p
0
0
EE
Figure 5 illustrates the overload
. When the load is tied to V
R
R
Time (50ns/div)
R
2
R
5
3
g
(V
+
CLC423
-
CC
R
f
Output
L
Input
-V
plot, in the
EE
C
R
) = 10V), but the
6
6
Z
0
EE
typical
, the
Fi
The
R
7
V
o
5
Non-inverting gain applications:
Inverting gain applications:
The input and output matching resistors attenuate the
signal by a factor of 2, therefore additional gain is
needed. Use C
over a greater frequency range. C
increase of the amplifier’s output impedance with
frequency.
Power Dissipation
Follow these steps to determine the power consumption
of the CLC423:
The maximum power that the DIP and SOIC packages
can dissipate at a given temperature is illustrated in
Figure 7. The power derating curve for any package can
be derived by utilizing the following equation:
where:
T
given package (°C/W)
ja = Thermal resistance, from junction to ambient, for a
amb
1. Calculate the quiescent (no-load) power:
2. Calculate the RMS power at the output stage:
3. Calculate the total RMS power:
= Ambient temperature (°C)
Connect R
Make R
Use R
loading caused by the transmission line, or
by parasitics.
Connect R
Make the resistors R
Make R
P
P
I
the external load.
P
load
amp
o
t
= P
1.0
0.8
0.6
0.4
0.2
Figure 7: Power Derating Curves
= (V
0
are the RMS voltage and current across
0
= I
3
amp
CC
1
5
to isolate the amplifier from reactive
6
CC
, R
20
II R
g
3
to match the output transmission line
+ P
- V
2
(V
Ambient Temperature ( C)
directly to ground.
directly to ground.
, R
40
g
AJE
load
CC
o
(175
= Z
6
60
, and R
- V
) (I
o
.
80
load
EE
JA
4
AJP
, R
T
)
amb
100 120 140 160 180
), where V
7
6
equal to Z
, and R
6
)
compensates for the
http://www.national.com
7
load
equal to Z
o
.
and
o
.

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