clc416 National Semiconductor Corporation, clc416 Datasheet - Page 5

• Manufacturer Part Number: clc416
• Description: Dual Low-power, 120mhz Op Amp
• Manufacturer: National Semiconductor Corporation

Driving Cables and Capacitive Loads
When driving cables, double termination is used to
prevent reflections. For capacitive load applications, a
small series resistor at the output of the CLC416 will
improve stability. The
in the Typical Performance section, gives the
recommended series resistance value for optimum
flatness at various capacitive loads.
Power Dissipation
The power dissipation of an amplifier can be described
in two conditions:
The following steps can be taken to determine the
power consumption for each CLC416 amplifier:
Add the total RMS powers for both channels to deter-
mine the power dissipated by the dual.
The maximum power that the package can dissipate at
a given temperature is illustrated in the Power
Derating curves in the Typical Performance section.
The power derating curve for any package can be
derived by utilizing the following equation:
where: T
Layout Considerations
A proper printed circuit layout is essential for achieving
high frequency performance. National provides
Figure 3: Input Referred Crosstalk vs. Frequency
1. Determine the quiescent power
2. Determine the RMS power at the output stage
3. Determine the total RMS power
Quiescent Power Dissipation -
P
Total Power Dissipation -
P
P
P
are the RMS voltage and current across the
external load.
P
Q
T
Q
O
T
JA
amb
(with Load Condition)
(No Load Condition)
-100
-120
= P
= I
-20
-40
-60
-80
= (V
= Thermal resistance, from junction to
= Ambient temperature (°C)
cc
ambient, for a given package (°C/W)
1
Q
cc
(V
+ P
- V
P
CC
O
load
- V
(175
Frequency (MHz)
R
EE
) (I
s
)
vs. Capacitive Load plot,
load
10
JA
Tamb)
), where V
load
100
and I
load
5
evaluation boards for the CLC416 (CLC730038 - DIP,
CLC730036 - SOIC) and suggests their use as a guide
for high frequency layout and as an aid for device test-
ing and characterization.
Supply bypassing is required for best performance.
The bypass capacitors provide a low impedance return
current path at the supply pins. They also provide high
frequency filtering on the power supply traces. Other
layout factors play a major role in high frequency
performance. The following are recommended as a
basis for high frequency layout:
Additional information is included in the evaluation
board literature.
SPICE Models
SPICE models provide a means to evaluate amplifier
designs. Free SPICE models are available for
National’s monolithic amplifiers that:
The readme file that accompanies the diskette lists
released models, and provides a list of modeled para-
meters.
SPICE Models for National’s Op Amps, contains
schematics and a reproduction of the readme file.
Instrumentation Amplifier
An instrumentation circuit is shown on the front page
and reproduced in Figure 4. The DC CMRR can be
fine tuned by adjusting R
V
V
348
1. Include 6.8 F tantalum and 0.1 F ceramic
2. Place the 6.8 F capacitors within 0.75 inches
3. Place the 0.1 F capacitors within 0.1 inches
4. Remove the ground plane under and around
5. Minimize all trace lengths to reduce series
1
2
Support Berkeley SPICE 2G and its many
derivatives
Reproduce typical DC, AC, Transient, and
Noise performance
Support room temperature simulations
capacitors on both supplies.
of the power pins.
of the power pins.
the part, especially near the input and output
pins to reduce parasitic capacitance.
inductances.
Figure 4: Instrumentation Amplifier
Applications Circuits
The application note OA-18, Simulation
+
1/2
CLC416
1/2
CLC416
-
-
+
348
348
348
348
1
.
R
348
1
CLC405
-
+
348
http://www.national.com
V
out
= 3(V
2
- V
1
)