clc430 National Semiconductor Corporation, clc430 Datasheet - Page 6

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clc430

Manufacturer Part Number
clc430
Description
General Purpose 100mhz Op Amp With Disable
Manufacturer
National Semiconductor Corporation
Datasheet

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Printed Circuit Layout
To get the best amplifier performance careful placement of
the amplifier, components and printed circuit traces must
be observed. Place the 0.1 F ceramic decoupling capaci-
tors less than 0.1" (3mm) from the power supply pins.
Place the 6.8 F tantalum capacitors less than 0.75"
(20mm) from the power supply pins. Shorten traces
between the inverting pin and components to less than
0.25" (6mm). Clear ground plane 0.1" (3mm) away from
pads and traces that connect to the inverting, non-
inverting and output pins. Do not place ground or power
plane beneath the op-amp package. Comlinear provides
literature and evaluation boards 730013 DIP or 730027
SOIC illustrating the recommended op-amp layout.
Applications Circuits
Level Shifting
The circuit shown in Fig. 4 implements level shifting by AC
coupling the input signal and summing a DC voltage. The
resistor R
frequency. The amplifier closed-loop bandwidth is fixed by
the selection of R
4 are different. The AC gain is set by the ratio of R
And the DC gain is set by the parallel combination of R
and R
Multiplexing
Multiple signal switching is easily handled with the disable
function of the CLC430. Board trace capacitance at the
output pin will affect the frequency response and switching
transients. To lessen the effects of output capacitance
place a resistor (R
2
Fig. 3 Improved DG and DP Video Amplifier
.
V
V
out
V
in
in
in
AC
and the capacitor C set the high-pass break
V
in
DC
V
Fig. 4 Level Shifting Circuit
R
in
in
C
f
ac
R
. The DC and AC gains for circuit of Fig.
o
R
g
) within the feedback loop to isolate the
2
1
R
+
-
CLC430
in
R
g
R
R
f
g
-
R
+
CLC430
||R
DG and DP
Add R to
f
improve
2
R
f
p
-V
V
cc
R
in
p
DC
R
s
R
R
V
2
f
V
out
out
f
and R
g
g
.
6
outputs as shown in Fig. 5. To match the mux output
impedance to a transmission line, add a resistor (R
series with the output.
Automatic Gain Control
Current-feedback amplifiers can implement very fast
automatic-gain control circuits. The circuit shown in Fig.
6 shows an AGC circuit using the CLC430, a half-wave
rectifier, an integrator and a FET. The CLC430 current-
feedback amplifier maintains constant bandwidth and
linear phase over AGC's gain range. This circuit effectively
controls the output level for continuous signals.
The bandwidth of the CLC430 AGC is limited by R
feedback resistor. The FET gate voltage is limited to a
range of:
R of 750
approximately 150 to 2K ohms. Scaling the integrator gain
or adding attenuation before the diode D accommodates
large signal swings. Determine the overall gain by:
The integrator sets the loop time constant.
V
in1
R
in
and C1 of 1.0 F gives a useful R
V
in2
R
in
Fig. 5 Output Connection
R
g
Fig. 6 AGC Circuit
1
2 5
R
.
g
CLC430
R
CLC430
g
V
R
DIS1
DIS2
R
R
g
f
f
f
R
ds
R
R
1
o
o
R
s
ds
range of
V
R
out
L
f
, the
s
) in

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