clc432 National Semiconductor Corporation, clc432 Datasheet - Page 9

• Manufacturer Part Number: clc432
• Description: Dual Wideband Monolithic Op Amp With Disable
• Manufacturer: National Semiconductor Corporation

Typical Performance Characteristics
specified) (Continued)
Recommended R
Application Division
Introduction
The CLC431 and the CLC432 are dual wideband
current-feedback op amps that operate from single (+10V to
+33V) or dual (
is equipped with a disable feature and is offered in 14-dip
DIP and SOIC packages. The CLC432 is packaged in a
standard 8-pin dual pinout and is offered in an 8-pin DIP and
SOIC. Evaluation boards are available for each version of
both devices. The evaluation boards can assist in the device
and/or application evaluation and were used to generate the
typical device performance plots on the preceding pages.
Each of the CLC431/CLC432’s dual channels provide
closely
characteristics making them ideal choices for wideband
signal processing. The CLC431, with its disable features,
can easily be configured as a 2:1 mux or several can be
used to form a 10:1 mux without performance degradation.
The two closely-matched channels of the CLC432 can be
combined to form composite circuits for such applications as
filter blocks, integrators, transimpedance amplifiers and
differential line drives and receivers.
Feedback Resistor Selection
The
current-feedback operational amplifier is determined largely
by the feedback resistor (R
influence ac response. Since the package parasitics of the
CLC431 and the CLC4332 are different, the optimum
frequency and phase response are obtained with different
values of feedback resistor (for A
CLC432: R
Typical Performance plot are valid for both devices under the
specified conditions. Generally, lowering R
recommended value will peak the frequency response and
extended the bandwidth while increasing its value will roll off
the response. Reducing the value of R
recommended value will cause overshoot, ringing and
eventually oscillation. For more information see Application
Note OA-20 and OA-13.
loop
matched
f
= 750 ). The Electrical Characteristics and
gain
±
5V to
f
vs. V
DC
and
±
CC
16.5) power supplies. The CLC431
&
(A
frequency
V
AC
f
). Package parasitic also
= +2)
V
= +2; CLC431: R
electrical
response
f
too far below its
performance
DS012712-26
f
f
from its
= 866 ,
for
a
(T
9
A
= +25˚C, A
In order to minimize the devices’ frequency and phase
response for gains other than +2V/V it is recommended to
adjust the value of the feedback resistor. The two plots found
in the Typical Performance section entitled “Recommended
R
feedback-resistor value that optimizes frequency and phase
response over the CLC431/CLC432’s gain range. Both pots
show the value of R
high non-inverting gains, which is characteristic of
current-feedback op amps and yields best results. The linear
portion of the two R
the limitation placed on R
maintain an adequate input impedance for the inverting
configuration. It should be noted that for stable operation a
non-inverting gain of +1 requires an R
the CLC431 and the CLC4332.
CLC431 Disable Feature
The CLC431 disable feature can be operated either
single-endedly or differentially thereby accommodating a
wide range of logic families. There are three pins associated
with the disable feature of each of the CLC431’s two
amplifiers: DIS,DIS and V
page). Also note that both amplifiers are guaranteed to be
enabled if all three of these pins are unconnected.
Figure 1 illustrates the single-ended mode of the CLC431’s
disable feature for logic families such as TTL and CMOS. In
order to operate properly, V
biasing DIS to approximately +1.4V through the two internal
series diodes. For single-ended operation, DIS should be left
floating. Applying a TTL or CMOS logic “high” (i.e.
to DIS will switch the tail current of the differential pair to Q1
and “shut down” Q2 which results in the disabling of that
channel of the CLC431. Alternatively, applying a logic “low”
(i.e.
Q2 effectively enabling that channel. If DIS is left floating
under single-ended operation, then the associated amplifier
is guaranteed to be disabled.
f
vs. Gain” provide the means of selecting the
<
0.8Volts) to DIS will switch the tail current from Q1 to
V
= +2, V
CC
f
f
vs. Inverting-gain curves results from
approaching a nonzero minimum at
=
±
RTTL
15V, unless
RTTL
g
(i.e. R
(please see pinout on front
must be grounded, thereby
g
f
equal to 1k for both
50 ) in order to
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>
2.0Volts)