sc1189 Semtech Corporation, sc1189 Datasheet - Page 7

• Manufacturer Part Number: sc1189
• Description: Sc1189 Programmable Synchronous Dc/dc Converter, Dual Ldo Controller
• Manufacturer: Semtech Corporation

Careful attention to layout requirements are necessary for
successful implementation of the SC1189 PWM control-
ler. High currents switching at 200kHz are present in the
application and their effect on ground plane voltage differ-
entials must be understood and minimized.
1). The high power parts of the circuit should be laid out
first. A ground plane should be used, the number and
position of ground plane interruptions should be such as
to not unnecessarily compromise ground plane integrity.
Isolated or semi-isolated areas of the ground plane may
be deliberately introduced to constrain ground currents to
particular areas, for example the input capacitor and bot-
tom FET ground.
2). The loop formed by the Input Capacitor(s) (Cin), the Top
FET (Q1) and the Bottom FET (Q2) must be kept as small
as possible. This loop contains all the high current, fast
POWER MANAGEMENT
Layout Guidelines
2007 Semtech Corp.
3.3V
10
Cin Lin
+
0.1uF
0.1uF
10
11
12
1
2
3
4
5
6
7
8
9
AGND
GATE1
LDOS1
LDOS2
VCC
PWRGD
LDOEN
CS-
CS+
PGNDH
DH
PGNDL
SC1189
Q3
Q4
VOSENSE
VID25MV
GATE2
LDOV
BSTH
BSTL
VID0
VID1
VID2
VID3
EN
DL
Cout Lin1
Cout Lin2
24
23
22
21
20
19
18
17
16
15
14
13
7
12V IN
transition switching. Connections should be as wide and
as short as possible to minimize loop inductance. Mini-
mizing this loop area will a) reduce EMI, b) lower ground
injection currents, resulting in electrically “cleaner” grounds
for the rest of the system and c) minimize source ringing,
resulting in more reliable gate switching signals.
3). The connection between the junction of Q1, Q2 and
the output inductor should be a wide trace or copper re-
gion. It should be as short as practical. Since this connec-
tion has fast voltage transitions, keeping this connection
short will minimize EMI. The connection between the out-
put inductor and the sense resistor should be a wide trace
or copper area, there are no fast voltage or current transi-
tions in this connection and length is not so important,
however adding unnecessary impedance will reduce effi-
ciency.
+
+
Q1
Q2
Vo Lin1
Vo Lin2
Cin
5V
+
Layout Diagram
SC1189
Heavy lines indicate
high current paths.
L
1.00k
5mOhm
2.32k
Cout
+
www.semtech.com
SC1189
Vout