lm2326slbx National Semiconductor Corporation, lm2326slbx Datasheet - Page 13

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lm2326slbx

Manufacturer Part Number
lm2326slbx
Description
Pllatinum? Low Power Frequency Synthesizer For Rf Personal Communications
Manufacturer
National Semiconductor Corporation
Datasheet
Note 8: The timeout counter decrements after each phase detector comparison cycle.
1.0 Functional Description
1.4 SERIAL DATA INPUT TIMING
Notes: Parenthesis data indicates programmable reference divider data.
Data shifted into register on clock rising edge.
Data is shifted in MSB first.
TEST CONDITIONS: The Serial Data Input Timing is tested using a symmetrical waveform around V
amplitudes of 1.84V
1.5 PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS
Notes: Phase difference detection range: −2 to +2
The Phase Detector Polarity F[6] = HIGH
The minimum width pump up and pump down current pulses occur at the ICP
( # PD Cycles)
Timeout
(Note 8)
F11
(16)
(32)
F12
F13
F14
(4)
(8)
@
V
CC
= 2.3V and 4.4V
3
0
0
0
0
TABLE 6. FastLock Timeout Counter Value Programming
7
1
0
0
0
@
V
CC
11
0
1
0
0
= 5.5V.
(Continued)
15
1
1
0
0
19
0
0
1
0
o
13
pin when the loop is locked.
23
1
0
1
0
27
0
1
1
0
CC/2
. The test waveform has an edge rate of 0.6V/ns with
31
1
1
1
0
35
0
0
0
1
DS100127-10
DS100127-9
59
0
1
1
1
www.national.com
63
1
1
1
1

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