NB7V52MMNHTBG ON Semiconductor, NB7V52MMNHTBG Datasheet - Page 5

• Manufacturer Part Number: NB7V52MMNHTBG
• Description: IC FLIP FLOP DATA/CLOCK D 16-QFN
• Manufacturer: ON Semiconductor
• Type: D-Typer

Specifications of NB7V52MMNHTBG

• Function: Reset
• Output Type: Differential
• Number Of Elements: 1
• Number Of Bits Per Element: 1
• Delay Time - Propagation: 300ps
• Trigger Type: Negative Edge
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 16-TQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -
• Current - Output High, Low: -
• Frequency - Clock: -

NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
10. Measured using a 400 mV V
11. Output voltage swing is a single−ended measurement operating in differential mode.
12. Additive RMS jitter with 50% duty cycle clock signal.
13. Input voltage swing is a single−ended measurement operating in differential mode.
Table 5. AC CHARACTERISTICS
f
f
V
t
t
t
t
t
t
t
V
t
MAX
DATA MAX
PLH
PHL
S
H
RR
PW
JITTER
r,
Symbol
OUTPP
INPP
, t
w40 ps (20% − 80%).
f
,
500
450
400
350
300
250
200
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
0
(V
Maximum Input Clock Frequency
Maximum Input Data Rate (PRBS23)
Output Voltage Amplitude (@ V
(See Figures 3 and 10, Note 11)
Propagation Delay to Differential Outputs, @ 1 GHz,
Measured at Differential Cross−point
Setup Time (D to CLK)
Hold Time (D to CLK)
Reset Recovery
Minimum Pulse Width
RJ – Output Random Jitter (Note 12)
Input Voltage Swing (Differential Configuration) (Note 13)
Output Rise/Fall Times @ 1 GHz (20% − 80%),
Figure 3. Clock Output Voltage Amplitude
1
OUTPP
2
Q/Q Output
) vs. Input Frequency (f
fin, Clock Input Frequency (GHz)
3
Temperature (Typ)
4
INPP
5
source, 50% duty cycle clock source. All output loading with external 50 W to V
6
V
CC
= 1.71 V to 2.625 V; V
7
INPPmin
Characteristic
8
in
) at Ambient
)
9
http://onsemi.com
10
11 12
EE
5
= 0 V; T
f
fin ≤ 10 GHz
in
fin ≤ 7 GHz
v 10 GHz
CLK/CLK to Q/Q
A
= −40°C to 85°C (Note 10)
Q, Q
R/R
R/R to Q/Q
VTD
VTD
Figure 4. Simplified Input Structure
D
D
50 W
50 W
Min
300
250
275
100
R
R
10
10
40
50
20
1
TIN
TIN
R
V
C
Typ
400
400
200
300
200
0.2
12
12
15
20
35
CC
I
CC
1200
R
Max
. Input edge rates
350
600
0.8
50
C
ps RMS
Gbps
Unit
GHz
mV
mV
ps
ps
ps
ps
ns
ps