DS1553P Maxim Integrated Products, DS1553P Datasheet - Page 4

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DS1553P

Manufacturer Part Number
DS1553P
Description
64K NV Y2KC Real Time Clocks RAM
Manufacturer
Maxim Integrated Products
Datasheet

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DATA RETENTION MODE
The 5-volt device is fully accessible and data can be written and read only when V
However, when V
internal clock registers and SRAM are blocked from any access. When V
point V
battery. RTC operation and SRAM data are maintained from the battery until V
levels.
The 3.3 volt device is fully accessible and data can be written and read only when V
When V
switched from V
than V
below V
nominal levels.
All control, data, and address signals must be powered down when V
BATTERY LONGEVITY
The DS1553 has a lithium power source that is designed to provide energy for the clock activity, and
clock and RAM data retention when the V
supply is sufficient to power the DS1553 continuously for the life of the equipment in which it is
installed. For specification purposes, the life expectancy is 10 years at 25 C with the internal clock
oscillator running in the absence of V
lithium energy source disconnected, guaranteeing full energy capacity. When V
level greater than V
is shipped from Dallas Semiconductor with its lithium energy source disconnected, guaranteeing full
energy capacity. When V
enabled for battery backup operation. Actual life expectancy of the DS1553 will be much longer than 10
years since no internal battery energy is consumed when V
INTERNAL BATTERY MONITOR
The DS1553 constantly monitors the battery voltage of the internal battery. The Battery Low Flag (BLF)
bit of the Flags Register (B4 of 1FF0h) is not writeable and should always be a 0 when read. If a 1 is ever
present, an exhausted lithium energy source is indicated and both the contents of the RTC and RAM are
questionable.
POWER-ON RESET
A temperature compensated comparator circuit monitors the level of V
fail trip point, the
independent of the RTC oscillator and thus is operational whether or not the oscillator is enabled.
CLOCK OPERATIONS
Table 2 and the following paragraphs describe the operation of RTC, alarm, and watchdog functions.
RST
signal continues to be pulled low for a period of 40 ms to 200 ms. The power-on reset function is
SO
SO
CC
, the device power is switched from V
SO
(battery supply level), device power is switched from the V
. RTC operation and SRAM data are maintained from the battery until V
falls below V
CC
CC
PF
RST
to the internal backup lithium battery when V
, the lithium energy source is enabled for battery backup operation. . Each DS1553
is below the power-fail point V
PF
signal (open drain) is pulled low. When V
CC
, access to the device is inhibited. If V
is first applied at a level greater than V
CC
. Each DS1553 is shipped from Dallas Semiconductor with its
CC
supply is not present. The capability of this internal power
CC
to the internal backup lithium battery when V
4 of 19
PF
CC
(point at which write protection occurs) the
is present.
PF
CC
is less than V
CC
CC
drops below V
CC
is powered down.
pin to the internal backup lithium
CC
PF
CC
, the lithium energy source is
. When V
returns to nominal levels, the
falls below the battery switch
CC
SO
CC
is returned to nominal
CC
CC
CC
, the device power is
PF
is first applied at a
is greater than V
is greater than V
. If V
falls to the power
CC
is returned to
PF
is greater
CC
DS1553
drops
PF
PF
.
.

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