nlsf1174 ON Semiconductor, nlsf1174 Datasheet - Page 2

• Manufacturer Part Number: nlsf1174
• Description: Hex D Flipflop With Common Clock And Reset
• Manufacturer: ON Semiconductor

*Equivalent to a two−input NAND gate.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. I
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
6. For high frequency or heavy load considerations, see the ON Semiconductor High−Speed CMOS Data Book (DL129/D).
DESIGN/VALUE TABLE
MAXIMUM RATINGS
Internal Gate Count*
Internal Gate Propagation Delay
Internal Gate Power Dissipation
Speed Power Product
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, V
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Thermal Resistance
Power Dissipation in Still Air at 85°C
Moisture Sensitivity
Flammability Rating
ESD Withstand Voltage
Latchup Performance
O
absolute maximum rating must be observed.
CC
and GND Pins
INPUTS
DATA
Parameter
Above V
CLOCK
RESET
Design Criteria
D0
D1
D2
D3
D4
D5
CC
and Below GND at 85°C (Note 5)
Charged Device Model (Note 4)
Figure 2. LOGIC DIAGRAM
(Referenced to GND) (Note 1)
Human Body Model (Note 2)
http://onsemi.com
Machine Model (Note 3)
Oxygen Index: 30 to 35
(Referenced to GND)
(Referenced to GND)
NLSF1174
PDIP, SOIC, TSSOP
2
QFN
QFN
Q0
Q1
Q2
Q3
Q4
Q5
I
Symbol
LATCHUP
V
T
V
I
MSL
V
V
OUT
I
q
P
I
STG
T
F
OUT
T
ESD
CC
CC
IN
JA
IN
D
R
L
J
NONINVERTING
OUTPUTS
UL 94 V−0 @ 0.125 in
*1.5 to V
*0.5 to V
*0.5 to )7.0
*65 to )150
Level 1
u2000
Value
Value
)150
u100
u500
$300
.0075
$20
$25
$50
40.5
260
800
1.5
5.0
80
CC
CC
)1.5
)0.5
°C/W
Unit
Unit
mW
mW
mA
mA
mA
mA
ea
°C
°C
°C
ns
pJ
V
V
V
V