74cbtlv3253ds NXP Semiconductors, 74cbtlv3253ds Datasheet
74cbtlv3253ds
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74cbtlv3253ds Summary of contents
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Dual 1-of-4 multiplexer/demultiplexer Rev. 01 — 8 January 2010 1. General description The 74CBTLV3253 provides a dual 1-of-4 high-speed multiplexer/demultiplexer with two common select inputs (S0, S1) and two output enable inputs (1OE, 2OE). The low ON resistance of ...
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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +125 °C 74CBTLV3253D −40 °C to +85 °C 74CBTLV3253DS 74CBTLV3253PW −40 °C to +125 °C −40 °C to +125 °C 74CBTLV3253BQ [1] Also known as QSOP16. 4. Functional diagram ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning 74CBTLV3253 1OE 2OE 1B4 1B3 2B4 1B2 5 12 2B3 6 11 1B1 2B2 2B1 8 9 GND 2A 001aal209 Fig 2. Pin configuration SOT109-1 (SO16) and SOT519-1 (SSOP16) 5.2 Pin description Table 2. Pin description Symbol ...
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... NXP Semiconductors 6. Functional description [1] Table 3. Function table Inputs 1OE 2OE [ HIGH voltage level LOW voltage level. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...
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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics At recommended operating conditions voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions V HIGH-level input voltage LOW-level input voltage input leakage pin nOE; V ...
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... NXP Semiconductors 9.2 ON resistance Table 7. Resistance recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit see Symbol Parameter Conditions R ON resistance see Figure see Figure ...
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... NXP Semiconductors (Ω (1) 5 (2) (3) ( 0.5 1.0 1.5 = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 9. ON resistance as a function of input voltage 2 (Ω) 6 (1) (2) ( 125 °C. ...
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... NXP Semiconductors = 125 °C. (1) T amb = 85 °C. (2) T amb = 25 °C. (3) T amb = −40 °C. (4) T amb Fig 13. ON resistance as a function of input voltage; V 74CBTLV3253_1 Product data sheet 7 (Ω) 6.5 5.5 (1) (2) 4.5 (3) 3.5 ( Rev. 01 — 8 January 2010 74CBTLV3253 Dual 1-of-4 multiplexer/demultiplexer ...
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... NXP Semiconductors 10. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure 16 Symbol Parameter Conditions t propagation delay nA to nBn or nBn to nA; pd see Figure nA; see enable time nOE nBn; en see Figure nBn ...
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... NXP Semiconductors 11. Waveforms Measurement points are given in Logic levels: V and V are typical output voltage levels that occur with the output load Fig 14. The data input (nA or nBn) to output (nBn or nA) propagation delays Table 9. Measurement points Supply voltage Input 2 2.7 V ...
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... NXP Semiconductors negative positive Test data is given in Table 10. Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to the output impedance External voltage for measuring switching times. EXT Fig 16. Test circuit for measuring switching times Table 10 ...
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... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors SSOP16: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.25 1.55 mm 1.73 0.25 0.10 1.40 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT519-1 Fig 18 ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0.30 3 0.2 0.00 0.18 3.4 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 12. Revision history Document ID Release date 74CBTLV3253_1 20100108 ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics 9.1 Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 9.2 ON resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 6 9.3 ON resistance test circuit and graphs Dynamic characteristics ...