nlsx3018 ON Semiconductor, nlsx3018 Datasheet

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nlsx3018

Manufacturer Part Number
nlsx3018
Description
8-bit 100 Mb/s Configurable Dual-supply Level Translator
Manufacturer
ON Semiconductor
Datasheet

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NLSX3018
8-Bit 100 Mb/s Configurable
Dual-Supply Level
Translator
level translator without a direction control pin. The I/O V
V
and V
to 4.5 V while the V
− 0.4) V. This allows lower voltage logic signals on the V
translated into higher voltage logic signals on the V
vice−versa. Both I/O ports are auto−sensing; thus, no direction pin is
required.
by putting them in 3−state. This significantly reduces the supply
currents from both V
V
Features
Typical Applications
© Semiconductor Components Industries, LLC, 2008
July, 2008 − Rev. P0
L
L
The NLSX3018 is a 8−bit configurable dual−supply bidirectional
The Output Enable (EN) input, when Low, disables both I/O ports
Wide Low−Side V
Wide High−Side V
High−Speed with 100 Mb/s Guaranteed Date Rate for V
Low Bit−to−Bit Skew
Overvoltage Tolerant Enable and I/O Pins
Non−preferential Powerup Sequencing
Small packaging: 4.0 mm x 2.0 mm UQFN20
This is a Pb−Free Device
Mobile Phones, PDAs, Other Portable Devices
−ports are designed to track two different power supply rails, V
.
L
respectively. The V
L
CC
L
CC
supply rail is configurable from 0.9 V to (V
Operating Range: 0.9 V to (V
and V
Operating Range: 1.3 V to 4.5 V
CC
supply rail is configurable from 1.3 V
L
. The EN signal is designed to track
CC
CC
− 0.4) V
CC
L
side to be
L
side, and
− and I/O
1
> 1.6 V
CC
CC
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
I/O V
I/O V
I/O V
I/O V
I/O V
I/O V
I/O V
I/O V
(Note: Microdot may be in either location)
EN
V
L
L
L
L
L
L
L
L
ORDERING INFORMATION
1
2
3
4
5
6
7
8
L
LA = Specific Device Code
M
G
MARKING DIAGRAM
10
1
2
3
4
5
6
7
8
9
http://onsemi.com
PIN ASSIGNMENT
= Date Code
= Pb−Free Package
CASE 517AK
MU SUFFIX
UQFN20
(Top View)
LAM
G
Publication Order Number:
20
19
18
17
16
15
14
13
12
11
NLSX3018/D
I/O V
I/O V
I/O V
I/O V
V
GND
I/O V
I/O V
I/O V
I/O V
CC
CC
CC
CC
CC
CC
CC
CC
CC
1
2
3
4
5
6
7
8

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nlsx3018 Summary of contents

Page 1

... NLSX3018 8-Bit 100 Mb/s Configurable Dual-Supply Level Translator The NLSX3018 is a 8−bit configurable dual−supply bidirectional level translator without a direction control pin. The I −ports are designed to track two different power supply rails and V respectively. The V supply rail is configurable from 1 ...

Page 2

Figure 1. Logic Diagram ...

Page 3

... NLSX3018 +1.8 V System I I I/ GND EN EN GND Figure 2. Typical Application Circuit PIN ASSIGNMENT Pins Description V V Input Voltage Input Voltage L L GND Ground EN Output Enable I I/O Port, Referenced I I/O Port, Referenced ...

Page 4

MAXIMUM RATINGS Symbol Parameter V V Supply Voltage Supply Voltage −Referenced DC Input/Output Voltage −Referenced DC Input/Output Voltage Enable Control Pin DC Input ...

Page 5

DC ELECTRICAL CHARACTERISTICS Symbol Parameter V I/O V Input HIGH IHC CC Voltage V I/O V Input LOW ILC CC Voltage V I/O V Input HIGH IHL L Voltage V I/O V Input LOW ILL L Voltage V Control Pin ...

Page 6

TIMING CHARACTERISTICS Symbol Parameter t I/O V Rise Time R−VCC CC (Output = I/O_V ) CC t I/O V Falltime F−VCC CC (Output = I/O_V ) CC t I/O V Risetime R−VL L (Output = I/O_V ) L t I/O ...

Page 7

... CC 0 – 0.4) 150 190 CC 0 – 0.4) 180 250 CC 0 – 0.4) 160 220 CC – 0.4) V during normal operation. However +25 °C. Limits over the operating A NLSX3018 V EN I IOVL RISE/FALL t PD_VCC− F−VL R−VL Test Circuit and Timing CC Unit ns ns ...

Page 8

PULSE GENERATOR PZH PHZ PZL PLZ equivalent (Includes jig and probe capacitance OUT Figure 6. Test Circuit for Enable/Disable ...

Page 9

... NLSX3378 open−drain auto sense translators are alternate translator options for an application such as the I requires pullup resistors. Enable Input (EN) The NLSX3018 has an Enable pin (EN) that provides tri−state operation at the I/O pins. Driving the Enable pin to a low logic level minimizes the power consumption of ORDERING INFORMATION ...

Page 10

... SURFACE OF TERMINALS. 5. DETAIL A SHOWS OPTIONAL CONSTRUCTION FOR TERMINALS. MILLIMETERS DIM MIN MAX A 0.45 0.55 A1 0.00 0.05 A3 0.13 REF b 0.15 0.25 D 4.00 BSC E 2.00 BSC e 0.40 BSC L 0.50 0.60 L1 0.00 0.03 L2 0.60 0.70 19X 20X 0.78 0.22 2.30 1 0.40 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NLSX3018/D ...

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