nlsx5012 ON Semiconductor, nlsx5012 Datasheet
nlsx5012
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nlsx5012 Summary of contents
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... L allows a logic signal on the V side to be translated to either a higher lower logic signal voltage on the V The NLSX5012 offers the feature that the values of the V V supplies are independent. Design flexibility is maximized L because V can be set to a value either greater than or less than the ...
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... Figure 2. Simplified Functional Diagram (1 I/O Line) 2 Peripheral ANO < V Figure 4. Application Example for http://onsemi.com One−Shot R1 N One−Shot I One−Shot R2 N One−Shot 1 Peripheral L CC NLSX5012 GND > ...
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I GND UDFN8 (Top View) PIN ASSIGNMENT Pins ...
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MAXIMUM RATINGS Symbol Parameter V High−side DC Supply Voltage CC V Low−side DC Supply Voltage L I −Referenced DC Input/Output Voltage −Referenced DC Input/Output Voltage Enable Control Pin DC Input ...
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DC ELECTRICAL CHARACTERISTICS Symbol Parameter V I/O V Input HIGH Voltage IHC CC V I/O V Input LOW Voltage ILC CC V I/O V Input HIGH Voltage IHL L V I/O V Input LOW Voltage ILL L V Control Pin ...
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TIMING CHARACTERISTICS Symbol Parameter t I/O V Rise Time R−VCC CC t I/O V Fall Time F−VCC CC t I/O V Rise Time R− I/O V Fall Time F− I/O V One−Shot OVCC CC Output Impedance ...
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TIMING CHARACTERISTICS (continued) Symbol Parameter t I/O_V Output Enable Time EN−VCC CC t I/O_V Output Enable Time EN− I/O_V Output Disable Time DIS−VCC CC t I/O_V Output Disable Time DIS−VL L MDR Maximum Data Rate 10. Normal test ...
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DYNAMIC POWER CONSUMPTION Symbol Parameter Input port MHz, PD_VL L Load V = Output Port Input port MHz, ...
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STATIC POWER CONSUMPTION (T Symbol Parameter Input port MHz, PD_VL L Load V = Output Port EN = GND (outputs disabled Input port ...
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... Test PHZ PLZ = equivalent 1 of pulse generator (typically 50 W) OUT GND t PHL Output t F Output http://onsemi.com 10 NLSX5012 I Source RISE/FALL t PD_VCC− F−VL R−VL Test Circuit and Timing CC 2xV CC OPEN ...
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... CMOS input stage. Enable Input (EN) The NLSX5012 translator has an Enable pin (EN) that provides tri−state operation at the I/O pins. Driving the Enable pin to a low logic level minimizes the power consumption of the device and drives the I pins to a high impedance state ...
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0.10 C PIN ONE E REFERENCE Ï Ï 0.10 C TOP VIEW (A3 SIDE VIEW e/2 DETAIL (b2 (L2 BOTTOM ...
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... G C SEATING PLANE −Z− 0.25 (0.010 *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. PACKAGE DIMENSIONS SO−8 CASE 751−07 ISSUE 0.10 (0.004) ...
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... BSC 0.026 BSC 0.40 0.55 0.70 0.016 0.021 0.028 4.75 4.90 5.05 0.187 0.193 0.199 5.28 mm inches ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NLSX5012/D ...