nlsx4373 ON Semiconductor, nlsx4373 Datasheet

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nlsx4373

Manufacturer Part Number
nlsx4373
Description
2-bit 20 Mb/s Dual-supply Level Translator
Manufacturer
ON Semiconductor
Datasheet

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NLSX4373
2-Bit 20 Mb/s Dual-Supply
Level Translator
auto sensing translator that does not require a directional control pin.
The V
power supply rails, V
configurable from 1.5 V to 5.5 V while V
to 1.5 V to 5.5 V. This allows voltage logic signals on the V
be translated into lower, higher or equal value voltage logic signals
on the V
10 kW pullup resistors on the I/O lines. The integrated pullup
resistors are used to pullup the I/O lines to either V
NLSX4373 is an excellent match for open−drain applications such as
the I
Features
Typical Applications
© Semiconductor Components Industries, LLC, 2008
December, 2008 − Rev. 1
The NLSX4373 is a 2−bit configurable dual−supply bidirectional
The NLSX4373 translator has open−drain outputs with integrated
Wide V
5.5 V
V
Wide V
High−Speed with 20 Mb/s Guaranteed Date Rate
Low Bit−to−Bit Skew
Enable Input and I/O Lines have Overvoltage Tolerant (OVT) to
Nonpreferential Powerup Sequencing
Integrated 10 kW Pullup Resistors
Small Space Saving Package − 1.8 x 1.2 x 0.5 mm UDFN8
This is a Pb−Free Device
I
Low Voltage ASIC Level Translation
Mobile Phones, PDAs, Cameras
2
L
C, SMBus, PMBus
2
C communication bus.
can be Less than, Greater than or Equal to V
CC
CC
I/O and V
L
CC
side, and vice−versa.
Operating Range: 1.5 V to 5.5 V
Operating Range: 1.5 V to 5.5 V
L
CC
I/O ports are designed to track two different
and V
L
respectively. The V
L
supply rail is configurable
CC
CC
L
supply rail is
or V
L
1
CC
side to
. The
I/O V
I/O V
†For information on tape and reel specifications,
NLSX4373MUTAG
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
EN
L
L
1
1
2
Device
I/O V
I/O V
ORDERING INFORMATION
8
VF = Specific Device Code
M
G
GND
V
L
L
http://onsemi.com
PIN ASSIGNMENT
LOGIC DIAGRAM
1
2
L
CASE 517AJ
= Date Code
= Pb−Free Package
MU SUFFIX
1
2
3
4
UDFN8
(Top View)
(Pb−Free)
Package
UDFN8
Publication Order Number:
8
7
6
5
3000/T ape & Reel
V
V
I/O V
I/O V
EN
MARKING
DIAGRAM
L
CC
Shipping
NLSX4373/D
V
VFM
CC
CC
CC
G
I/O V
I/O V
1
2
GND
CC
CC
1
2

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nlsx4373 Summary of contents

Page 1

... CC The NLSX4373 translator has open−drain outputs with integrated 10 kW pullup resistors on the I/O lines. The integrated pullup resistors are used to pullup the I/O lines to either V NLSX4373 is an excellent match for open−drain applications such as 2 the I C communication bus. Features • ...

Page 2

V L PU1 R Pullup PIN ASSIGNMENT Pins Description V V Input Voltage Input Voltage L L GND Ground EN Output Enable I I/O Port, Referenced to V ...

Page 3

MAXIMUM RATINGS Symbol Parameter V High−side DC Supply Voltage CC V High−side DC Supply Voltage L I −Referenced DC Input/Output Voltage −Referenced DC Input/Output Voltage Enable Control Pin DC Input ...

Page 4

DC ELECTRICAL CHARACTERISTICS Symbol Parameter V I/O V Input HIGH Voltage IHC CC V I/O V Input LOW Voltage ILC CC V I/O V Input HIGH Voltage IHL L V I/O V Input LOW Voltage ILL L V Control Pin ...

Page 5

TIMING CHARACTERISTICS − RAIL−TO−RAIL DRIVING CONFIGURATIONS (I/O test circuit of Figures 2 and pF, driver output impedance LOAD Symbol Parameter I/O ...

Page 6

TIMING CHARACTERISTICS − RAIL−TO−RAIL DRIVING CONFIGURATIONS (I/O test circuit of Figures 2 and 3, C LOAD Symbol Symbol Parameter Parameter I/O V Risetime RVCC CC t I/O V Falltime ...

Page 7

... LOAD C LOAD R R LOAD LOAD Figure 5. Open−Drain Driving I I 90% 50% 10 PD_VCC−VL PD_VL−VCC I 90% 50% 10% t R−VCC http://onsemi.com 7 NLSX4373 I Source CC NLSX4373 I RISE/FALL t PD_VCC− F−VL R−VL ...

Page 8

PULSE GENERATOR PZH PHZ PZL PLZ equivalent (Includes jig and probe capacitance OUT Figure 7. Test Circuit for Enable/Disable ...

Page 9

... Enable Input (EN) The NLSX4373 has an Enable pin (EN) that provides tri−state operation at the I/O pins. Driving the Enable pin ports, input signals to a low logic level minimizes the power consumption of the device and drives the I/O V impedance state ...

Page 10

... CONSTRUCTION FOR TERMINALS. MILLIMETERS DIM MIN MAX A 0.45 0.55 A1 0.00 0.05 A3 0.127 REF b 0.15 0.25 b2 0.30 REF D 1.80 BSC E 1.20 BSC e 0.40 BSC L 0.45 0.55 L1 0.00 0.03 L2 0.40 REF MOUNTING FOOTPRINT SOLDERMASK DEFINED 8X 0.66 7X 1.50 1 0.40 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your loca Sales Representative NLSX4373/D ...

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