at93c46w-10su-2.7 ATMEL Corporation, at93c46w-10su-2.7 Datasheet

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at93c46w-10su-2.7

Manufacturer Part Number
at93c46w-10su-2.7
Description
Three-wire Serial Eeprom 1k 128 X 8 Or 64 X 16
Manufacturer
ATMEL Corporation
Datasheet
Features
Description
The AT93C46 provides 1024 bits of serial electrically erasable programmable read-
only memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is
connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to
ground). The device is optimized for use in many industrial and commercial applica-
tions where low-power and low-voltage operations are essential. The AT93C46 is
available in space-saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead
Ultra Thin mini-MAP (MLP 2x3), 8-lead TSSOP, and 8-lead dBGA2 packages.
The AT93C46 is enabled through the Chip Select pin (CS) and accessed via a
three-wire serial interface consisting of Data Input (DI), Data Output (DO), and Shift
Clock (SK). Upon receiving a Read instruction at DI, the address is decoded and the
data is clocked out serially on the DO pin. The Write cycle is completely self-timed,
and no separate Erase cycle is required before Write. The Write cycle is only enabled
when the part is in the Erase/Write Enable state. When CS is brought high following
the initiation of a Write cycle, the DO pin outputs the Ready/Busy status of the part.
The AT93C46 is available in 2.7V to 5.5V and 1.8V to 5.5V versions.
Table 1. Pin Configurations
Pin Name
CS
SK
DI
DO
GND
VCC
ORG
DC
Low-voltage and Standard-voltage Operation
User-selectable Internal Organization
Three-wire Serial Interface
2 MHz Clock Rate (5V)
Self-timed Write Cycle (10 ms max)
High Reliability
Automotive Grade Devices Available
8-lead JEDEC PDIP, 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead Ultra Thin mini-MAP
(MLP 2x3), 8-lead TSSOP and 8-ball dBGA2 Packages
– 2.7 (V
– 1.8 (V
– 1K: 128 x 8 or 64 x 16
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
CC
CC
= 2.7V to 5.5V)
= 1.8V to 5.5V)
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Internal Organization
Don’t Connect
8-lead Ultra Thin mini-MAP (MLP 2x3)
DO
CS
SK
DI
ORG
GND
DO
VCC
CS
SK
DI
DC
1
2
3
4
Bottom View
8-lead SOIC
8
7
6
5
8-lead PDIP
1
2
3
4
8
7
6
5
8
7
6
5
1
2
3
4
CS
SK
DI
DO
VCC
DC
ORG
GND
VCC
DC
ORG
GND
VCC
DO
CS
SK
DC
CS
SK
DI
ORG
GND
VCC
DC
(1K JEDEC Only)
8-lead TSSOP
1
2
3
4
8-lead dBGA2
1
2
3
4
Bottom View
8-lead SOIC
Rotated (R)
8
7
6
5
1
2
3
4
8
7
6
5
CS
SK
D1
D0
8
7
6
5
ORG
GND
DO
DI
VCC
DC
ORG
GND
Three-wire
Serial
EEPROM
1K (128 x 8 or 64 x 16)
AT93C46
Note:
Not recommended for new
design; please refer to
AT93C46D datasheet.
5140B–SEEPR–2/07
1

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at93c46w-10su-2.7 Summary of contents

Page 1

... Description The AT93C46 provides 1024 bits of serial electrically erasable programmable read- only memory (EEPROM), organized as 64 words of 16 bits each (when the ORG pin is connected to VCC), and 128 words of 8 bits each (when the ORG pin is tied to ground). The device is optimized for use in many industrial and commercial applica- tions where low-power and low-voltage operations are essential ...

Page 2

Absolute Maximum Ratings* Operating Temperature......................................−55°C to +125°C Storage Temperature .........................................−65°C to +150°C Voltage on Any Pin with Respect to Ground ........................................ −1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA AT93C46 2 *NOTICE: Figure 1. Block ...

Page 3

Table 2. Pin Capacitance Applicable over recommended operating range from T Symbol Test Conditions C Output Capacitance (DO) OUT C Input Capacitance (CS, SK, DI) IN Note: 1. This parameter is characterized and is not 100% tested. Table 3. ...

Page 4

Table 4. AC Characteristics Applicable over recommended operating range from TTL Gate and 100 pF (unless otherwise noted) Symbol Parameter SK Clock f SK Frequency t SK High Time SKH t SK Low Time SKL Minimum ...

Page 5

... Erase instruction and address are decoded. The DO pin outputs the Ready/Busy status of the part brought high after being kept low for a minimum of 250 ns (t logic “1” at pin DO indicates that the selected memory location has been erased and the part is ready for another instruction. ...

Page 6

... The ERAL instruction is valid only WRITE ALL (WRAL): The Write All (WRAL) instruction programs all memory locations with the data patterns specified in the instruction. The DO pin outputs the Ready/Busy status of the part brought high after being kept low for a minimum of 250 ns (t ...

Page 7

Figure 3. READ Timing High Impedance Figure 4. EWEN Timing Figure 5. EWDS Timing 5140B–SEEPR–2/07 ... ... ...

Page 8

Figure 6. WRITE Timing HIGH IMPEDANCE DO (1) Figure 7. WRAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC Figure 8. ERASE Timing CS SK ...

Page 9

Figure 9. ERAL Timing HIGH IMPEDANCE DO Note: 1. Valid only 4.5V to 5.5V. CC 5140B–SEEPR–2/ STANDBY CHECK STATUS BUSY HIGH IMPEDANCE ...

Page 10

... AT93C46 Ordering Information Ordering Code (2) AT93C46-10PU-2.7 (2) AT93C46-10PU-1.8 (2) AT93C46-10SU-2.7 (2) AT93C46-10SU-1.8 (2) AT93C46W-10SU-2.7 (2) AT93C46W-10SU-1.8 (2) AT93C46-10TU-2.7 (2) AT93C46-10TU-1.8 (2) AT93C46Y1-10YU-1.8 (Not recommended for new designs) (3) AT93C46Y6-10YH-1.8 (2) AT93C46U3-10UU-1.8 (4) AT93C46-W1.8-11 Notes: 1. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the Table 3 on page 3 and Table 4 on page 4. Not recommended for new design. Please refer to AT93C46D datasheet. ...

Page 11

Packaging Information 8P3 – PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA for additional information. 2. Dimensions A and L are measured ...

Page 12

JEDEC SOIC Top View e Side View Note: These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R ...

Page 13

EIAJ SOIC 1 N Top View e D Side View Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information. 2. Mismatch of the upper and lower dies and resin burrs ...

Page 14

TSSOP Pin 1 indicator this corner N Top View Side View Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-153, Variation AA, for proper dimensions, tolerances, datums, ...

Page 15

PIN 1 BALL PAD CORNER Top View PIN 1 BALL PAD CORNER 1 2 (d1 (e1) Bottom View 8 SOLDER BALLS 1. Dimension “b” is measured at the maximum solder ball diameter. This ...

Page 16

Mini-MAP D Notes: 1. This drawing is for general information only. Refer to JEDEC Drawing MO-229, for proper dimensions, tolerances, datums, etc. 2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm ...

Page 17

Revision History 5140B–SEEPR–2/07 Doc. Rev. Date Comments 5140B 2/2007 Implemented revision history. Added note to page 1 and ordering information; ‘Not recommended for new design; please refer to AT93C46D datasheet’. 17 ...

Page 18

... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life © 2007 Atmel Corporation. All rights reserved. Atmel trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...

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