at24c1024 ATMEL Corporation, at24c1024 Datasheet
at24c1024
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at24c1024 Summary of contents
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... Die Sales: Wafer Form, Waffle Pack and Bumped Die Description The AT24C1024 provides 1,048,576 bits of serial electrically erasable and program- mable read only memory (EEPROM) organized as 131,072 words of 8 bits each. The device’s cascadable feature allows up to two devices to share a common two-wire bus ...
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... Storage Temperature .....................................–65°C to +150°C Voltage on Any Pin with Respect to Ground .................................... –1.0V to +7.0V Maximum Operating Voltage .......................................... 6.25V DC Output Current........................................................ 5.0 mA Figure 1. Block Diagram AT24C1024 2 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and ...
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... V mends connecting the pin to GND. Switching software write-protect function. Memory AT24C1024, 1024K SERIAL EEPROM: The 1024K is internally organized as 512 pages of 256 bytes each. Random word addressing requires a 17-bit data word address. Organization 1471O–SEEPR–3/07 plane is < ...
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... Input Low Level IL (1) V Input High Level IH V Output Low Level OL Note min and V max are reference only and are not tested AT24C1024 4 = 25° 1.0 MHz –40°C to +85° Test Condition V = 5.0V READ at 400 kHz 5.0V WRITE at 400 kHz ...
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Table 4. AC Characteristics (1) Applicable over recommended operating range from T otherwise noted) Symbol Parameter f Clock Frequency, SCL SCL t Clock Pulse Width Low LOW t Clock Pulse Width High HIGH t Clock Low to Data Out Valid ...
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... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowl- edge that it has received each word. STANDBY MODE: The AT24C1024 features a low-power standby mode which is enabled: a) upon power-up and b) after the receipt of the stop bit and the completion of any internal operations ...
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Figure 2. Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O Figure 3. Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) SCL SDA 8th BIT WORDn Note: 1. The write cycle time t is the time from a ...
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... Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C1024 has a hardware data protection scheme that allows the user to write-protect the entire memory when the WP pin ...
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... Write BYTE WRITE: To select a data word in the 1024K memory requires a 17-bit word address. The word address field consists of the P Operations word address followed by the least significant word address (see Figure 8 on page 11) A write operation requires the P address word and acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first 8-bit data word ...
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... The sequential read operation is terminated when the microcontroller does not respond with a zero, but does generate a following stop condition (see Figure 12 on page 12). AT24C1024 10 1471O–SEEPR–3/07 ...
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Figure 7. Device Address Figure 8. Byte Write Figure 9. Page Write P 0 Figure 10. Current Address Read 1471O–SEEPR–3/07 0 MOST LEAST SIGNIFICANT SIGNIFICANT P 0 MOST LEAST SIGNIFICANT SIGNIFICANT 11 ...
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... Figure 11. Random Read P 0 Figure 12. Sequential Read High Byte ADDRESS P 0 AT24C1024 12 High Byte Low Byte ADDRESS ADDRESS Low Byte ADDRESS Data Data Data 1471O–SEEPR–3/07 ...
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... AT24C1024-W2.7-11 Notes: 1. This device is not recommended for new design. Please refer to AT24C1024B datasheet. For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC Characteristics tables. 2. “U” designates Green Package & RoHS compliant. 3. Available in waffle pack and wafer form; order as SL788 for wafer form. Bumped die available upon request. Please contact Serial EEPROM Marketing ...
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... Marked Pin1 Indentifier E 0.10 mm TYP Bottom View Note: 1. Metal Pad Dimensions. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024 14 D Top View Pin1 Corner TITLE 8CN1, 8-lead ( 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) ...
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PDIP Top View PLCS Side View Notes: 1. This drawing is for general information only; refer to JEDEC Drawing MS-001, Variation BA, for additional information. 2. Dimensions A and L are measured with the ...
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... It is recommended that upper and lower cavities be equal. If they are different, the larger dimension shall be regarded. 4. Determines the true geometric position. 5. Values b and C apply to pb/Sn solder plated terminal. The standard thickness of the solder layer shall be 0.010 +0.010/−0.005 mm. 2325 Orchard Parkway San Jose, CA 95131 R AT24C1024 ∅ End View ...
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SAP PIN 1 INDEX AREA D E 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 R 1471O–SEEPR–3/07 A PIN COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN A – A1 0.00 ...
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... Revision History Doc. Rev. 1471O AT24C1024 18 Date Comments 3/2007 Implemented revision history. Added ‘Not recommended for new design; please refer to AT24C1024B datasheet’ note to page 1 and page 13. 1471O–SEEPR–3/07 ...
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... Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life © 2007 Atmel Corporation. All rights reserved. Atmel marks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Atmel Operations Memory ...