at24c256c ATMEL Corporation, at24c256c Datasheet - Page 7

• Manufacturer Part Number: at24c256c
• Description: Two-wire Serial Eeprom
• Manufacturer: ATMEL Corporation

8568A–SEEPR–11/08
SOFTWARE RESET: After an interruption in protocol, power loss or system reset, any 2-wire part can be protocol reset
by following these steps:
a)
b)
c)
The device is ready for next communication after above steps has been completed.
Figure 4.
Figure 5.
Figure 6.
SDA
Note:
SCL
SDA
SDA OUT
SCL
SDA IN
Create a start bit condition,
Clock 9 cycles,
Create another start bit followed by stop bit condition as shown below.
SCL
1. The write cycle time t
WORDn
Start bit
internal clear/write cycle.
Software Reset
Bus Timing
Write Cycle Timing
8th BIT
t
SU.STA
1
ACK
WR
2
t
HD.STA
is the time from a valid stop condition of a write sequence to the end of the
t
t
F
LOW
t
CONDITION
AA
Dummy Clock Cycles
3
STOP
t
HIGH
t
HD.DAT
t
LOW
8
t
wr
(1)
AT24C256C [Preliminary]
t
t
SU.DAT
DH
9
CONDITION
START
Start bit
t
R
Stop bit
t
SU.STO
t
BUF
7