25lc080c Microchip Technology Inc., 25lc080c Datasheet - Page 7

• Manufacturer Part Number: 25lc080c
• Description: 8k-256k Spi Serial Eeprom High Temp Family Data Sheet
• Manufacturer: Microchip Technology Inc.

2.0
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
2.1
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high during a
program cycle, the device will go into Standby mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A low-to-high transition on CS after a valid write
sequence initiates an internal write cycle. After power-
up, a low level on CS is required prior to any sequence
being initiated.
2.2
The SO pin is used to transfer data out of the 25XX.
During a read cycle, data is shifted out on this pin after
the falling edge of the serial clock.
2.3
This pin is used in conjunction with the WPEN bit in the
STATUS register to prohibit writes to the nonvolatile
bits in the STATUS register. When WP is low and
WPEN is high, writing to the nonvolatile bits in the STA-
TUS register is disabled. All other operations function
normally. When WP is high, all functions, including
writes to the nonvolatile bits in the STATUS register
operate normally. If the WPEN bit is set, WP low during
a STATUS register write sequence will disable writing
to the STATUS register. If an internal write cycle has
already begun, WP going low will have no effect on the
write.
© 2009 Microchip Technology Inc.
HOLD
Name
SCK
V
V
WP
CS
SO
SI
CC
SS
PIN DESCRIPTIONS
Chip Select (CS)
Serial Output (SO)
Write-Protect (WP)
Pin Number
PIN FUNCTION TABLE
1
2
3
4
5
6
7
8
Chip Select Input
Serial Data Output
Write-Protect Pin
Ground
Serial Data Input
Serial Clock Input
Hold Input
Supply Voltage
Function
Preliminary
The WP pin function is blocked when the WPEN bit in
the STATUS register is low. This allows the user to
install the 25XX in a system with WP pin grounded and
still be able to write to the STATUS register. The WP pin
functions will be enabled when the WPEN bit is set
high.
2.4
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
2.5
The SCK is used to synchronize the communication
between a master and the 25XX. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
2.6
The HOLD pin is used to suspend transmission to the
25XX while in the middle of a serial sequence without
having to retransmit the entire sequence again. It must
be held high any time this function is not being used.
Once the device is selected and a serial sequence is
underway, the HOLD pin may be pulled low to pause
further serial communication without resetting the
serial sequence. The HOLD pin must be brought low
while SCK is low, otherwise the HOLD function will not
be invoked until the next SCK high-to-low transition.
The 25XX must remain selected during this sequence.
The SI, SCK and SO pins are in a high-impedance
state during the time the device is paused and transi-
tions on these pins will be ignored. To resume serial
communication, HOLD must be brought high while the
SCK pin is low, otherwise serial communication will
not resume. Lowering the HOLD line at any time will
tri-state the SO line.
Serial Input (SI)
Serial Clock (SCK)
Hold (HOLD)
DS22131A-page 7
25XX