25lc640 Microchip Technology Inc., 25lc640 Datasheet - Page 11

• Manufacturer Part Number: 25lc640
• Description: 64k Spi Bus Serial Eeprom
• Manufacturer: Microchip Technology Inc.

3.6
The Write Status Register instruction (WRSR) allows the
user to select one of four levels of protection for the
array by writing to the appropriate bits in the STATUS
register. The array is divided up into four segments.
The user has the ability to write-protect none, one, two,
or all four of the segments of the array. The partitioning
is controlled as shown in Table 3-2.
The Write-Protect Enable (WPEN) bit is a nonvolatile
bit that is available as an enable bit for the WP pin. The
Write-Protect (WP) pin and the Write-Protect Enable
(WPEN) bit in the STATUS register control the pro-
grammable hardware write-protect feature. Hardware
write protection is enabled when the WP pin is low and
the WPEN bit is high. Hardware write protection is dis-
abled when either the WP pin is high or the WPEN bit
is low. When the chip is hardware write-protected, only
writes to nonvolatile bits in the STATUS register are dis-
abled. See Table 3-3 for a matrix of functionality on the
WPEN bit.
See Figure 3-7 for WRSR timing sequence.
FIGURE 3-7:
© 2008 Microchip Technology Inc.
SCK
SO
CS
SI
Write Status Register Instruction
(WRSR)
0
0
0
WRITE STATUS REGISTER TIMING SEQUENCE
1
0
2
Instruction
0
3
0
4
0
5
High-Impedance
0
6
1
7
TABLE 3-2:
7
8
BP1
6
0
0
1
1
25AA640/25LC640
9
Data to STATUS Register
10
5
11
4
ARRAY PROTECTION
BP0
0
1
0
1
12
3
13
2
Array Addresses
Write-Protected
(1800h-1FFFh)
(1000h-1FFFh)
(0000h-1FFFh)
14
1
upper 1/4
upper 1/2
DS21223H-page 11
none
all
15
0