at88sc018 ATMEL Corporation, at88sc018 Datasheet - Page 15

• Manufacturer Part Number: at88sc018
• Description: Cryptocompanion? Chip For Cryptomemory And Cryptorf
• Manufacturer: ATMEL Corporation

1.6.3. Reset Locking
1.6.4. Security Delay
1.6.5. Command Sequencing
5277C–CryptoCompanion–9/09
Certain conditions cause the AT88SC018 to lock up until the reset pin is asserted or the power is cycled. Depending on
the time interval from the last power-up, this action may or may not cause a delay to be enforced. During this time, the
status register will show the RstLocked error state and the busy pin will be asserted.
a)
b)
c)
d)
e)
When certain operations do not complete successfully, the AT88SC018 will enter a temporary security delay for a
period of time during which no commands will be honored by the AT88SC018. During this time, the system may read
the status register which will contain the TimeDelay error code & busy bit set.
The following conditions cause the AT88SC018 to enter a security delay when it is locked. Unlocked AT88SC018 chips
never enter the security delay sequence.
a)
b)
c)
d)
e)
The first time one of these conditions is detected after a power cycle or reset event, the AT88SC018 will delay ~260ms.
After each subsequent failure condition is detected, the AT88SC018 will delay for an interval twice the length of the
previous delay.
Once this doubling reaches a delay equal to or greater than PwrDelay, all subsequent failure conditions will trigger a
lockout interval equal to PwrDelay. The maximum Security Delay is 32s, regardless of the value of PwrDelay.
Depending on whether the AT88SC018 is locked or not, some commands must be executed in a certain order, this
section outlines those restrictions.
1.6.5.1. When the AT88SC018 is Unlocked
When the AT88SC018 is unlocked, there is no security delay and there is no requirement that Startup/Challenge be
executed prior to any other command. This strategy may facilitate quicker initialization.
Note:
When the AT88SC018 is unlocked, the following commands are enabled:
• Read Memory can be run only if the least significant two bits of the lock byte in EEPROM are both 0. All locations
• ReadMemoryDigest can be run on all locations within the EEPROM if Lock[1:0] has a value of 0x10.
• WriteMemory can be run over all locations from 0x30 onwards.
• WriteMemoryEncrypted can only be run if Lock[1:0] has a value of 0x10.
• The Lock command can be run to exit the unlocked state.
from 0x30 onwards can be read.
Some command other than VerifyFlash is attempted before Startup/ChallengeResponse has been run or some
command other than ChallengeResponse follows Startup.
ChallengeResponse is run but the preceding command is not Startup.
VerifyFlash fails for any reason other than that it has been disabled.
ChallengeResponse fails for any reason.
Second attempt to run VerifyFlash in a single power cycle.
A second attempt to run Startup after the first has completed within the same power or reset cycle.
Some command other than Auth_2 follows Auth_1.
The values sent to the AT88SC018 for Auth_2 do not match those computed internally (authentication failed).
The values sent to the AT88SC018 for Encryption_2 do not match those computed internally (encryption key
verification failed).
An illegal command ordinal is sent to the AT88SC018.
The Power Delay continues to be active when unlocked and authentication must still be run for those
commands that require it (EncryptPassword, Encryption_1&2, GrindBytes).
CryptoCompanion Chip
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