at88sc1608 ATMEL Corporation, at88sc1608 Datasheet - Page 14

• Manufacturer Part Number: at88sc1608
• Description: 8 X 256 X 8 Secure Memory With Authentication
• Manufacturer: ATMEL Corporation

Stop Condition
Acknowledge
Standby Mode
Acknowledge Polling
14
AT88SC1608
A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence,
the stop command will place the device in a standby power mode (see Figure 13).
All addresses and data are serially transmitted to and from the device in 8-bit words.
The device sends a zero to acknowledge that it has received each byte. This happens
during the ninth clock cycle. During read operations, the host must pull the SDA line low
during the ninth clock cycle to acknowledge that it has received the data byte. Failure to
transmit this ACK bit will terminate the read operation.
The AT88SC1608 features a low-power standby mode that is enabled upon power-up
and after the receipt of the stop bit and the completion of any internal operations.
Once the internally-timed write cycle has started and the device inputs are disabled,
acknowledge polling can be initiated. This involves sending a start condition followed by
the device address representative of the operation desired. Only if the internal write
cycle has completed will the device respond with a “0”, allowing the sequence to
continue.
Figure 13. Start and Stop Definition
Note:
Figure 14. Data Validity
SDA
SCL
The SCL input should be low when the device is idle. Therefore, SCL is low before a start
condition and after a stop condition.
DATA STABLE
CHANGE
DATA
DATA STABLE
0971G–SMEM–04/04