24fc65 Microchip Technology Inc., 24fc65 Datasheet
24fc65
Related parts for 24fc65
24fc65 Summary of contents
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... SCL C SDA V CC block address lines allow the connection eight 24FC65's on the same bus for up to 512K bits contiguous EEPROM memory. The 24FC65 is available in the standard 8-pin plastic DIP and 8-pin surface mount SOIC package. 24FC65 EEPROM ...
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... ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* V ...................................................................................7.0V CC All inputs and outputs w.r.t. V ............... -0. Storage temperature .....................................- +150 C Ambient temp. with power applied ................- +125 C Soldering temperature of leads (10 seconds) ............. +300 C ESD protection on all pins *Notice: Stresses above those listed under “Maximum Ratings” ...
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... T HIGH DAT SU DAT 24FC65 Remarks (Note 1) (Note 1) After this period the first clock pulse is generated Only relevant for repeated START (Note 2) Time the bus must be free before a new transmission can start 25°C, Vcc = 5.0V, Block Mode (Note ...
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... During reads, a master must signal an end of data to the slave by NOT generating an acknowledge bit on the last byte that has been clocked out of the slave. In this case, the slave (24FC65) must leave the data line HIGH to enable the master to generate the STOP. (D) (D) ...
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... A control byte is the first byte received following the START from the master device. The control byte consists of a four bit control code, for the 24FC65 this is set as 1010 binary for read and write operations. The next three bits of the control byte are the device select bits (A2, A1, A0) ...
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... FIGURE 4-2: PAGE WRITE (FOR CACHE WRITE, SEE FIGURE 7- BUS CONTROL A BYTE ADDRESS (1) ACTIVITY: R MASTER T S SDA LINE BUS C ACTIVITY: K FIGURE 4-3: CURRENT ADDRESS READ BUS ACTIVITY MASTER SDA LINE BUS ACTIVITY FIGURE 4-4: RANDOM READ S T BUS WORD CONTROL ...
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... Then the master issues the control byte again but with the R/W bit set to a one. The 24FC65 will then issue an acknowledge and transmit the eight bit data word. The master will not acknowledge the transfer but does generate a STOP which causes the 24FC65 to discontinue transmission (Figure 4-4) ...
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... After the third byte is sent to the device, it will acknowledge and a STOP bit is then sent by the master to complete the command. During a normal write sequence attempt is made to write to a protected address, no data will be written and the device will not report an error or abort the command ...
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... Since the write begins at page 3 and 8 pages are loaded into the cache, the last 3 pages of the cache are written to the next row in the array. 2004 Microchip Technology Inc. 24FC65 7.2 Cache Write Starting at a Non-Page Boundary When a write command is initiated that does not begin at a page boundary (i ...
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... FIGURE 7-1: CACHE WRITE TO THE ARRAY STARTING AT A PAGE BOUNDARY 1 Write command initiated at byte 0 of page 3 in the array; First data byte is loaded into the cache byte 0. cache page 0 cache cache byte 0 byte 1 3 Write from cache into array initiated by STOP bit. ...
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... PIN DESCRIPTIONS 8.1 A0, A1, A2 Chip Address Inputs The A0..A2 inputs are used by the 24FC65 for multiple device operation and conform to the two-wire bus standard. The levels applied to these pins define the address block occupied by the device in the address map. A particular device is selected by transmitting the corresponding bits (A2, A1, A0) in the control byte (Figure 3-2 and Figure 8-1) ...
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... Product Identification System To order or to obtain information (e.g., on pricing or delivery), please use the listed part numbers, and refer to the factory or the listed sales offices. 24FC65 – /P Package: Temperature Range: Device: Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds ...
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... Use of Microchip’s products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. 2004 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC ...
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... Via Salvatore Quasimodo, 12 20025 Legnano (MI) Milan, Italy Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands Waegenburghtplein 4 NL-5152 JR, Drunen, Netherlands Tel: 31-416-690399 Fax: 31-416-690340 United Kingdom 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44-118-921-5869 Fax: 44-118-921-5820 07/12/04 2004 Microchip Technology Inc. ...