is62wv5128dbll-45tli Integrated Silicon Solution, Inc., is62wv5128dbll-45tli Datasheet

no-image

is62wv5128dbll-45tli

Manufacturer Part Number
is62wv5128dbll-45tli
Description
512k?x?8?low?voltage,? Ultra?low?power?cmos?static?ram?
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL
512K x 8 LOW VOLTAGE, 
ULTRA LOW POWER CMOS STATIC RAM   
FEATURES
• High-speed access time: 35, 45, 55 ns
• CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V – 2.2V V
2.3V – 3.6V V
• Fully static operation: no clock or refresh
• Three state outputs
• Industrial and Automotive temperature support
• Lead-free available
FUNCTIONAL BLOCK DIAGRAM
Integrated Silicon Solution, Inc. — www.issi.com —
Rev.  00A
02/28/2011
Copyright © 2010 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
required
dd
dd
(IS62WV5128dBLL)
(IS62WV5128dALL)
I/O0-I/O7
A0-A18
V
GND
DD
CS1
WE
OE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
1-800-379-4774
DESCRIPTION
The
high-speed, 4M bit static RAMs organized as 512K words
by 8 bits. It is fabricated using
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When CS1 is HIGH (deselected) the device assumes
a standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62WV5128DALL and IS62WV5128DBLL are
packaged in the JEDEC standard 32-pin TSOP (TYPE
I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin
SOP and 36-pin mini BGA.
ISSI
MEMORY ARRAY
IS62WV5128DALL / IS62WV5128DBLL are
COLUMN I/O
512K x 8
ADVANCED INFORMATION
      
ISSI
MARCH 2011
     
's high-performance
1

Related parts for is62wv5128dbll-45tli

is62wv5128dbll-45tli Summary of contents

Page 1

... When CS1 is HIGH (deselected) the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels. Easy memory expansion is provided by using Chip Enable and Output Enable inputs. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62WV5128DALL and IS62WV5128DBLL are packaged in the JEDEC standard 32-pin TSOP (TYPE I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin SOP and 36-pin mini BGA. DECODER MEMORY ARRAY ...

Page 2

... D GND E VDD F I/O6 A18 A17 I/O7 A16 G OE CS1 A9 A10 A12 A11 H 2 Integrated Silicon Solution, Inc. — www.issi.com — I/O0 I/O1 VDD GND I/O2 A15 I/O3 A13 A14 1-800-379-4774                             Rev.  00A ...

Page 3

... A16 10 A14 11 12 A12 Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 32-pin SOP (Package Code Q) 32-pin TSOP (TYPE II) (Package Code T2) A17 A16 2 31 A10 A14 3 30 ...

Page 4

... CAPACITANCE (1,2)   Symbol  Parameter    C Input Capacitance In C Input/Output Capacitance I/O Notes: 1. Tested initially and after any design or process changes that may affect these parameters. 2. Test conditions 25° MHz Integrated Silicon Solution, Inc. — www.issi.com —   I /O Operation  High High Out ...

Page 5

... See Figures 1 and Ω Ω (V) tm AC TEST LOADS R1 VTM OUTPUT 30 pF Including jig and scope Figure 1. Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 Unit  Unit  (3.3V + 5%)  - 0. 1V/ ns 1V/ ns VDD /2 VDD + 0.05 ...

Page 6

... LI I Output Leakage LO Note (min.) = –0.3V DC; V (min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested V (max 0.3V dC; V (max Integrated Silicon Solution, Inc. — www.issi.com — (Over Operating Range) Test Conditions  Min – Min 2 ≤ V GND ≤ ≤ ...

Page 7

... CMOS Standby Current (CMOS Inputs) CE ≥ V In Note address and data inputs are cycling at the maximum frequency means no input lines change. mAx 2. Typical values are measured 3.0V Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 V Speed DD 1.65V-2.2V 45ns 1.65V-2.2V 55ns 1.65V-2.2V 55ns 2.3V-3.6V 3 ...

Page 8

... READ CYCLE NO. 1 (1,2)  (Address Controlled) (CS1 = ADDRESS D OUT PREVIOUS DATA VALID 8 Integrated Silicon Solution, Inc. — www.issi.com —   (1) (Over Operating Range)   35 ns      45 ns     Min.    Max.  Min.    Max.  ...

Page 9

... IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL  AC WAVEFORMS READ CYCLE NO. 2 (1,3) (CS1, OE Controlled) ADDRESS OE CS1 t LZCS1 HIGH-Z DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CS1 Address is valid prior to or coincident with CS1 LOW transition. Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 DOE t LZOE t ACS1 . WE ...

Page 10

... WRITE CYCLE NO. 1 (CS1 Controlled HIGH or LOW) ADDRESS CS1 DOUT DATA UNDEFINED DIN 10 Integrated Silicon Solution, Inc. — www.issi.com — (1,2) (Over Operating Range)   35ns      45ns    Min.    Max.    Min.   Max.  35 — 45 — ...

Page 11

... ADDRESS OE CS1 DOUT DATA UNDEFINED DIN WRITE CYCLE NO. 3  (WE Controlled LOW During Write Cycle) ADDRESS OE CS1 DOUT DATA UNDEFINED DIN Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 SCS1 PWE t t HZWE HIGH ...

Page 12

... Data Retention Setup Time See Data Retention Waveform Sdr t Recovery Time rdr Note: 1. Typical values are measured at V DATA RETENTION WAVEFORM (CS1 Controlled) t SDR CS1 GND 12 Integrated Silicon Solution, Inc. — www.issi.com — Test Condition  See Data Retention Waveform V = 1.2V, CS1 ≥ V – 0. See Data Retention Waveform = 3.0V and not 100% tested Data Retention Mode CS1 ≥ ...

Page 13

... IS62WV5128DALL-55HI IS62WV5128DALL-55HLI 55 IS62WV5128DALL-55BI IS62WV5128DALL-55BLI ORDERING INFORMATION IS62WV5128BLL (2.3V - 3.6V) Industrial Range: –40°C to +85°C   Speed (ns)  Order Part No.  45 IS62WV5128DBLL-45TI 45 IS62WV5128DBLL-45TLI 45 IS62WV5128DBLL-45QLI 45 IS62WV5128DBLL-45T2I 45 IS62WV5128DBLL-45T2LI 45 IS62WV5128DBLL-45HI 45 IS62WV5128DBLL-45HLI 45 IS62WV5128DBLL-45BI 45 IS62WV5128DBLL-45BLI Integrated Silicon Solution, Inc. — www.issi.com — ...

Page 14

... IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL  14 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774                             Rev.  00A 02/28/2011 ...

Page 15

... IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL  Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 1-800-379-4774 15 ...

Page 16

... IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL  16 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774                             Rev.  00A 02/28/2011 ...

Page 17

... IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL  Integrated Silicon Solution, Inc. — www.issi.com — Rev.  00A 02/28/2011 1-800-379-4774 17 ...

Page 18

... IS62WV5128DALL/DBLL, IS65WV5128DALL/DBLL  18 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774                             Rev.  00A 02/28/2011 ...

Related keywords