is62lv12816bll Integrated Silicon Solution, Inc., is62lv12816bll Datasheet

no-image

is62lv12816bll

Manufacturer Part Number
is62lv12816bll
Description
128k X 16 Low Voltage, Ultra Low Power Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
is62lv12816bll-55TI
Manufacturer:
ISSI
Quantity:
2 148
Part Number:
is62lv12816bll-70BI
Manufacturer:
ISSI
Quantity:
20 000
Part Number:
is62lv12816bll-70TI
Manufacturer:
ISSI
Quantity:
2 148
IS62LV12816BLL
FEATURES
• High-speed access time: 55, 70, 100 ns
• CMOS low power operation
• TTL compatible interface levels
• Single 2.7V-3.45V V
• Fully static operation: no clock or refresh
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Available in the 44-pin TSOP (Type II) and
FUNCTIONAL BLOCK DIAGRAM
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any
errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
03/07/01
128K x 16 LOW VOLTAGE, ULTRA
LOW POWER CMOS STATIC RAM
– 120 mW (typical) operating
– 6 µW (typical) CMOS standby
required
48-pin mini BGA (6mm x 8mm)
CC
Lower Byte
Upper Byte
I/O8-I/O15
I/O0-I/O7
power supply
A0-A16
VCC
GND
WE
CE
OE
UB
LB
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
DESCRIPTION
The
static RAM organized as 131,072 words by 16 bits. It is
fabricated using
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-performance
and low power consumption devices.
When CE is HIGH (deselected) or when CE is low and
both LB and UB are HIGH, the device assumes a standby
mode at which the power dissipation can be reduced down
with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS62LV12816BLL is packaged in the JEDEC standard
44-pin TSOP (Type II) and 48-pin mini BGA (6mm x 8mm).
ISSI
IS62LV12816BLL is a high-speed, 2,097,152-bit
MEMORY ARRAY
COLUMN I/O
128K x 16
ISSI
's high-performance CMOS
ISSI
FEBRUARY 2001
®
1

Related parts for is62lv12816bll

is62lv12816bll Summary of contents

Page 1

... Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory. A data byte allows Upper Byte (UB) and Lower Byte (LB) access. The IS62LV12816BLL is packaged in the JEDEC standard 44-pin TSOP (Type II) and 48-pin mini BGA (6mm x 8mm). DECODER MEMORY ARRAY ...

Page 2

... IS62LV12816BLL PIN CONFIGURATIONS 44-Pin TSOP (Type II I/O0 7 I/O1 8 I/O2 9 I/O3 10 Vcc 11 GND 12 I/O4 13 I/O5 14 I/ A16 18 A15 19 A14 20 A13 21 A12 22 PIN DESCRIPTIONS A0-A16 Address Inputs I/O0-I/O15 Data Inputs/Outputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input ...

Page 3

... IS62LV12816BLL OPERATING RANGE Range Ambient Temperature Commercial 0°C to +70°C Industrial –40°C to +85°C ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM T Temperature Under Bias BIAS V Vcc Related to GND CC T Storage Temperature STG P Power Dissipation T Note: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device ...

Page 4

... IS62LV12816BLL AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Level Output Load AC TEST LOADS 3070 Ω 3.0V OUTPUT 30 pF Including jig and scope Figure 1 4 Unit 0. 1.3V See Figures 1 and 2 OUTPUT 3150 Ω ...

Page 5

... IS62LV12816BLL POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions I Vcc Dynamic Operating V CC Supply Current I OUT I TTL Standby Current (TTL Inputs ≥ ULB Control CMOS Standby ≥ V Current (CMOS Inputs ULB Control V V Note: 1 ...

Page 6

... IS62LV12816BLL AC WAVEFORMS (1,2) (Address Controlled) ( READ CYCLE NO. 1 ADDRESS D OUT PREVIOUS DATA VALID AC WAVEFORMS READ CYCLE NO. 2 (1,3) (CE, OE, AND UB/LB Controlled) ADDRESS LZCE LB LZB HIGH-Z D OUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE, UB Address is valid prior to or coincident with CE LOW transition. ...

Page 7

... IS62LV12816BLL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA LB, UB Valid to End of Write t PWB WE Pulse Width t PWE t Data Setup to Write End ...

Page 8

... IS62LV12816BLL (WE Controlled HIGH During Write Cycle) WRITE CYCLE NO. 2 ADDRESS OE CE LOW UB DATA UNDEFINED OUT D IN WRITE CYCLE NO. 3 (WE Controlled LOW During Write Cycle) ADDRESS OE LOW CE LOW UB DATA UNDEFINED OUT VALID ADDRESS ...

Page 9

... IS62LV12816BLL WRITE CYCLE NO. 4 (UB/LB Controlled) ADDRESS OE CE LOW WE UB HZWE D OUT DATA UNDEFINED D IN DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V Vcc for Data Retention DR I Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM ...

Page 10

... IS62LV12816BLL-10B Mini BGA (6mm x 8mm) 10 Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 55 IS62LV12816BLL-55TI TSOP (Type II) IS62LV12816BLL-55BI Mini BGA (6mm x 8mm) 70 IS62LV12816BLL-70TI TSOP (Type II) IS62LV12816BLL-70BI Mini BGA (6mm x 8mm) 100 IS62LV12816BLL-10TI TSOP (Type II) IS62LV12816BLL-10BI Mini BGA (6mm x 8mm) ISSI Integrated Silicon Solution, Inc ...

Related keywords