is62lv1288ll Integrated Silicon Solution, Inc., is62lv1288ll Datasheet

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is62lv1288ll

Manufacturer Part Number
is62lv1288ll
Description
128k X 8 Low Power And Low Vcc Cmos Static Ram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS62LV1288LL
128K x 8 LOW POWER and LOW Vcc
CMOS STATIC RAM
FEATURES
• Access times of 45, 55, and 70 ns
• Low active power: 60 mW (typical)
• Low standby power: 15 µW (typical) CMOS
• Low data retention voltage: 2V (min.)
• Ultra Low Power
• Output Enable (OE) and two Chip Enable
• TTL compatible inputs and outputs
• Single 2.5V (min.) to 3.45V (max.) power supply
• Industrial temperature available
• Available in 32-pin TSOP (Type I), 32-pin
FUNCTIONAL BLOCK DIAGRAM
This document contISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no
responsibility for any errors which may appear in this publication. © Copyright 2001, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/22/01
standby
(CE1 and CE2) inputs for ease in applications
STSOP, and 450-mil SOP
I/O0-I/O7
A0-A16
VCC
GND
CE1
CE2
WE
OE
DECODER
CIRCUIT
CONTROL
CIRCUIT
DATA
I/O
DESCRIPTION
The
Vcc,131,072-word by 8-bit CMOS static RAM. It is
fabricated using
technology. This highly reliable process coupled with
innovative circuit design techniques, yields higher
performance and low power consumption devices.
When CE1 is HIGH or CE2 is LOW (deselected), the
device assumes a standby mode at which the power
dissipation can be reduced by using CMOS input levels.
Easy memory expansion is provided by using two Chip
Enable inputs, CE1 and CE2. The active LOW Write Enable
(WE) controls both writing and reading of the memory.
The IS62LV1288LL is available in 32-pin TSOP (Type I),
STSOP (8 x 13.4mm), and 450-mil plastic SOP (525-mil
pin to pin) packages.
ISSI
MEMORY ARRAY
COLUMN I/O
IS62LV1288LL is a low power and low
512 X 2048
ISSI
's high-performance CMOS
FEBUARY 2001
®
1

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is62lv1288ll Summary of contents

Page 1

... Easy memory expansion is provided by using two Chip Enable inputs, CE1 and CE2. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62LV1288LL is available in 32-pin TSOP (Type I), STSOP (8 x 13.4mm), and 450-mil plastic SOP (525-mil pin to pin) packages. ...

Page 2

... IS62LV1288LL PIN CONFIGURATION 32-Pin SOP ( VCC A16 2 31 A15 A14 3 30 CE2 A12 A13 A11 A10 CE1 I/O7 I/ I/O6 I/ I/O5 I/ I/O4 GND 16 17 I/O3 PIN DESCRIPTIONS A0-A16 Address Inputs ...

Page 3

... IS62LV1288LL TRUTH TABLE WE CE1 Mode Not Selected X H (Power-down Output Disabled H L Read H L Write L L ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM V Vcc related to GND CC T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation ...

Page 4

... IS62LV1288LL DC ELECTRICAL CHARACTERISTICS Symbol Parameter V Output HIGH Voltage OH V Output LOW Voltage OL V Input HIGH Voltage IH V Input LOW Voltage IL I Input Leakage LI I Output Leakage LO Notes –3.0V for pulse width less than 10 ns. IL POWER SUPPLY CHARACTERISTICS Symbol Parameter Test Conditions ...

Page 5

... IS62LV1288LL READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time AA t Output Hold Time OHA CE1 Access Time t 1 ACE t CE2 Access Time 2 ACE OE Access Time t DOE OE to Low-Z Output t (2) LZOE OE to High-Z Output t (2) HZOE ...

Page 6

... IS62LV1288LL AC WAVEFORMS READ CYCLE NO. 1 (1,2) ADDRESS DOUT READ CYCLE NO. 2 (1,3) ADDRESS OE CE1 CE2 DOUT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE, CE1 = V 3. Address is valid prior to or coincident with CE1 LOW and CE2 HIGH transitions OHA ...

Page 7

... IS62LV1288LL WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time WC CE1 to Write End t 1 SCE t CE2 to Write End 2 SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t 1,2 PWE t Data Setup to Write End ...

Page 8

... IS62LV1288LL WRITE CYCLE NO. 2 (WE, Controlled HIGH during Write Cycle) ADDRESS OE CE1 CE2 WE DOUT DIN WRITE CYCLE NO. 3 (WE Controlled LOW during Write Cycle) ADDRESS OE CE1 CE2 WE DOUT DIN Notes: 1. The internal write time is defined by the overlap of CE1 LOW, CE2 HIGH and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write ...

Page 9

... IS62LV1288LL DATA RETENTION SWITCHING CHARACTERISTICS Symbol Parameter V Vcc for Data Retention DR I Data Retention Current DR t Data Retention Setup Time SDR t Recovery Time RDR DATA RETENTION WAVEFORM (CE1 Controlled 3.0V 2. CE1 GND DATA RETENTION WAVEFORM (CE2 Controlled 3.0 CE2 2. ...

Page 10

... STSOP, Type I Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 45 IS62LV1288LL-45QI 450-mil Plastic SOP IS62LV1288LL-45TI TSOP, Type I IS62LV1288LL-45HI STSOP, Type I 55 IS62LV1288LL-55QI 450-mil Plastic SOP IS62LV1288LL-55TI TSOP, Type I IS62LV1288LL-55HI STSOP, Type I 70 IS62LV1288LL-70QI 450-mil Plastic SOP IS62LV1288LL-70TI TSOP, Type I IS62LV1288LL-70HI STSOP, Type I Integrated Silicon Solution, Inc. — ...

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