is62lv256-70rti Integrated Silicon Solution, Inc., is62lv256-70rti Datasheet
is62lv256-70rti
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is62lv256-70rti Summary of contents
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... Chip Enable (CE) input and an active LOW Output Enable (OE) input. The active LOW Write Enable (WE) controls both writing and reading of the memory. The IS62LV256 is pin compatible with other 32K x 8 SRAMs in 300-mil SOJ, 330-mil plastic SOP, and TSOP (Type I Normal and Reverse Bent) packages. ...
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... IS62LV256 PIN CONFIGURATION 28-Pin SOJ and SOP A14 1 28 A12 GND 14 15 PIN DESCRIPTIONS A0-A14 Address Inputs CE Chip Enable Input OE Output Enable Input WE Write Enable Input ...
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... IS62LV256 ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Terminal Voltage with Respect to GND TERM T Temperature Under Bias BIAS T Storage Temperature STG P Power Dissipation Output Current (LOW) OUT Notes: 1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied ...
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... IS62LV256 POWER SUPPLY CHARACTERISTICS Symbol Parameter I Vcc Operating 1 CC Supply Current I Vcc Dynamic Operating 2 CC Supply Current I TTL Standby Current 1 SB (TTL Inputs) I CMOS Standby 2 SB Current (CMOS Inputs) Notes address and data inputs are cycling at the maximum frequency means no input lines change. ...
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... IS62LV256 AC TEST CONDITIONS Parameter Input Pulse Level Input Rise and Fall Times Input and Output Timing and Reference Levels Output Load 1213 3.3V OUTPUT 100 pF Including jig and scope Figures 1a READ CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Read Cycle Time RC t Address Access Time ...
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... IS62LV256 AC WAVEFORMS (1,2) READ CYCLE NO. 1 ADDRESS D OUT (1,3) READ CYCLE NO. 2 ADDRESS OUT t SUPPLY CURRENT Notes HIGH for a Read Cycle. 2. The device is continuously selected. OE Address is valid prior to or coincident with CE LOW transitions OHA ...
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... IS62LV256 WRITE CYCLE SWITCHING CHARACTERISTICS Symbol Parameter t Write Cycle Time Write End t SCE t Address Setup Time to Write End AW t Address Hold from Write End HA t Address Setup Time SA WE Pulse Width t (4) PWE t Data Setup to Write End SD t Data Hold from Write End ...
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... IS62LV256 AC WAVEFORMS Controlled) WRITE CYCLE NO. 1 (WE ADDRESS OUT DATA UNDEFINED Controlled WRITE CYCLE NO. 2 (CE ADDRESS OUT DATA UNDEFINED D IN Notes: 1. The internal write time is defined by the overlap of CE LOW and WE LOW. All signals must be in valid states to initiate a Write, but any one can go inactive to terminate the Write ...
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... Industrial Range: –40°C to +85°C Speed (ns) Order Part No. Package 45 IS62LV256-45JI 300- 45 IS62LV256-45UI 330-mil SOP 45 IS62LV256-45TI TSOP (T 70 IS62LV256-70UI 330-mil SOP 70 IS62LV256-70TI TSOP (T 70 IS62LV256-70RTI TSOP (T Integrated Silicon Solution, Inc. — www.issi.com — Rev. K 12/11/02 P SOJ MIL LASTIC SOP MIL I ) YPE NORMAL BENT SOP MIL I ) YPE ...