is42sm32800e-75bli Integrated Silicon Solution, Inc., is42sm32800e-75bli Datasheet - Page 21

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is42sm32800e-75bli

Manufacturer Part Number
is42sm32800e-75bli
Description
2m X 32bits X 4banks Mobile Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
Rev. 00B | Aug. 2011
Table11A: 3.3V DC Characteristic (DC operating conditions unless otherwise noted)
Operating Current
Precharge Standby Current
in Power Down Mode
Precharge Standby Current
in Non Power Down Mode
Active Standby Current
in Power Down Mode
Active Standby Current
in Non Power Down Mode
Burst Mode Operating Current
Auto Refresh Current (8K Cycle)
Self
Refresh
Current
Deep Power Down Mode Current
Note :
1. Measured with outputs open.
2 Refresh period is 64ms
2. Refresh period is 64ms.
P
Parameter
4 B
4 Banks
2 Banks
Quarter
1 Bank
PASR
Bank
Bank
Half
k
t
TCSR
45C
85C
45C
45C
85C
45C
45C
85C
85C
85C
IDD2NS
IDD3NS
IDD2PS
IDD3PS
IDD2N
IDD3N
IDD2P
IDD3P
S
Sym
IDD1
IDD4
IDD5
IDD6
IDD7
Burst Length=1, One Bank Active,
tRC  tRC(min) IOL = 0 mA
CKE  VIL(max), tCK = 10ns
CKE & CLK  VIL(max), tCK = 
CKE  VIH(min), /CS  VIH(min), tCK = 10ns
Input signals are changed one time during 2 clks
Input signals are changed one time during 2 clks.
CKE  VIH(min), CLK  VIL(max), tCK = 
Input signals are stable.
CKE  VIL(max), tCK = 10ns
CKE & CLK  VIL(max), tCK = 
CKE  VIH(min), /CS  VIH(min), tCK = 10ns
Input signals are changed one time during 2 clks.
CKE  VIH(min), CLK  VIL(max), tCK = 
Input signals are stable.
tCK>tCK(min), IOL = 0 mA, Page Burst
All Banks Activated, tCCD = 1 clk
tRC  tRFC(min), All Banks Active
CKE  0.2V
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T
Test Condition
- DRAM@issi.com
t C
diti
IS42/45SM/RM/VM32800E
-6
95
Speed
300
300
130
320
220
280
200
260
180
250
170
240
160
80
10
20
10
10
4
1
1
Advanced Information
-75
85
U it
Unit
mA
mA
mA
mA
mA
mA
mA
A
A
A
N t
Note
1
1
2
21

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