m93c46-wmn3tp-s STMicroelectronics, m93c46-wmn3tp-s Datasheet - Page 15

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m93c46-wmn3tp-s

Manufacturer Part Number
m93c46-wmn3tp-s
Description
16kbit, 8kbit, 4kbit, 2kbit, 1kbit And 256bit 8-bit Or 16-bit Wide
Manufacturer
STMicroelectronics
Datasheet
M93C86, M93C76, M93C66, M93C56, M93C46
5.3
Figure 4.
1. For the meanings of An, Xn, Qn and Dn, see
Erase Byte or Word
The Erase Byte or Word (ERASE) instruction sets the bits of the addressed memory byte (or
word) to 1. Once the address has been correctly decoded, the falling edge of the Chip
Select Input (S) starts the self-timed Erase cycle. The completion of the cycle can be
detected by monitoring the READY/BUSY line, as described in the
section.
Read
Write
Write
Enable
READ, WRITE, WEN, WDS sequences
S
Q
S
S
Q
D
D
D
1 0
1
1 1 0 An
CODE
CODE
CODE
OP
OP
0
OP
1
0
1
An
1
ADDR
ADDR
Xn X0
A0
A0
Qn
Dn
Table
5.,
DATA OUT
DATA IN
Table 6.
Write
Disable
and
Table
S
D
D0
Q0
7..
BUSY
READY/BUSY status
1
CODE
STATUS
CHECK
0
OP
0
0
0
READY
Xn X0
Instructions
AI00878d
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