m34d64-w STMicroelectronics, m34d64-w Datasheet - Page 17

• Manufacturer Part Number: m34d64-w
• Description: 64 Kbit Serial I2c Bus Eeprom With Hardware Write Control On Top Quarter Of Memory
• Manufacturer: STMicroelectronics

M34D64
3.10
3.11
Read operations
Random Address Read
Figure 9.
1. The seven most significant bits of the Device Select Code of a Random Read (in the 1
Read operations are performed independently of the state of the Write Control (WC) signal.
A dummy Write is performed to load the address into the address counter (as shown in
Figure 9.: Read mode
master sends another Start condition, and repeats the Device Select Code, with the
Read/Write bit (RW) set to 1. The device acknowledges this, and outputs the contents of the
addressed byte. The bus master must not acknowledge the byte, and terminates the transfer
with a Stop condition.
must be identical.
Current
Address
Read
Random
Address
Read
Sequential
Current
Read
Sequential
Random
Read
Read mode sequences
Dev sel *
Dev sel *
ACK
Dev sel
Dev sel
sequences) but without sending a Stop condition. Then, the bus
Data out N
R/W
R/W
R/W
ACK
ACK
ACK
ACK
R/W
NO ACK
Data out 1
Byte addr
Byte addr
Data out
NO ACK
ACK
ACK
ACK
Byte addr
Byte addr
ACK
ACK
ACK
Data out N
Dev sel *
Dev sel *
NO ACK
R/W
ACK
ACK
R/W
st
Device operation
Data out 1
and 4
Data out
th
AI01105d
bytes)
NO ACK
ACK
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