mr0a16a Freescale Semiconductor, Inc, mr0a16a Datasheet
mr0a16a
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mr0a16a Summary of contents
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... The MR0A16A is available in a 400-mil, 44-lead plastic small-outline TSOP type-II package with an industry-standard center power and ground SRAM pinout. The MR0A16A is available in Commercial (0°C to 70°C), Industrial ( 40°C to 85°C) and Extended - ( 40°C to 105°C) ambient temperature ranges. ...
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... A12 A11 A10 Figure 2. MR0A16A in 44-Pin TSOP Type II Package MR0A16A Advanced Information Data Sheet, Rev UPPER BYTE OUTPUT ENABLE LOWER BYTE OUTPUT ENABLE 8 8 ROW COLUMN DECODER DECODER SENSE AMPS 16 64K x 16 BIT MEMORY ...
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... The device also contains protection against external magnetic fields. Precautions should be taken to avoid application of any magnetic field more intense than the maximum field intensity specified in the maximum ratings. MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor Table 2. Operating Modes 1 ...
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... Memory is designed to prevent writing for all input pin conditions if V falls below minimum (max 0.3 Vdc (min) = –0.5 Vdc MR0A16A Advanced Information Data Sheet, Rev Table 3. Absolute Maximum Ratings Table 4. Operating Conditions Symbol ...
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... NOTES: 1 All active current measurements are measured with one address transition per cycle. Parameter Address input capacitance Control input capacitance Input/output capacitance NOTES 1.0 MHz 3 MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor Table 5. dc Characteristics Symbol I lkg(I) I lkg( ...
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... Logic output timing measurement reference level Logic input pulse levels Input rise/fall time Output load for low and high impedance parameters Output load for all other timing parameters OUTPUT MR0A16A Advanced Information Data Sheet, Rev Table 8. ac Measurement Conditions Parameter = 50 Ω Z ...
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... MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor This page is intentionally blank. Electrical Specifications 7 ...
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... Addresses valid before or at the same time E goes low. 4 This parameter is sampled and not 100% tested. 5 Transition is measured ±200 mV from steady-state voltage. MR0A16A Advanced Information Data Sheet, Rev Table 9. Read Cycle Timing Symbol t AVAV t AVQV ...
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... A (ADDRESS) Q (DATA OUT) PREVIOUS DATA VALID NOTES: Device is continuously selected (E ≤ (ADDRESS) E (CHIP ENABLE) G (OUTPUT ENABLE) LB, UB (BYTE ENABLE) Q (DATA OUT) MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor t AVAV t AXQX t AVQV , G ≤ Figure 4. Read Cycle 1 t AVAV t AVQV ...
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... All write cycle timings are referenced from the last valid address to the first transition address. 7 This parameter is sampled and not 100% tested. 8 Transition is measured ±200 mV from steady-state voltage any given voltage or temperature, t MR0A16A Advanced Information Data Sheet, Rev Symbol t AVAV t AVWL ...
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... A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) LB, UB (BYTE ENABLE) D (DATA IN) Hi-Z Q (DATA OUT) MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor t AVAV t AVWH t WLEH t WLWH t AVWL t DATA VALID t WLQZ Hi-Z Figure 6. Write Cycle 1 (W Controlled) Timing Specifications t WHAX t DVWH WHDX t WHQX 11 ...
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... If E goes low at the same time or after W goes low, the output will remain in a high-impedance state goes high at the same time or before W goes high, the output will remain in a high-impedance state. MR0A16A Advanced Information Data Sheet, Rev Symbol t AVAV ...
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... A (ADDRESS) E (CHIP ENABLE) W (WRITE ENABLE) LB, UB (BYTE ENABLE) D (DATA IN) Q (DATA OUT) MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor t AVAV t AVEH t AVEL Hi-Z Figure 7. Write Cycle 2 (E Controlled) Timing Specifications t EHAX t ELEH t ELWH t t DVEH EHDX DATA VALID 13 ...
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... The minimum time between E being asserted low in one cycle to E being asserted low in a subsequent cycle is the same as the minimum cycle time allowed for the device. 7 All write cycle timings are referenced from the last valid address to the first transition address. MR0A16A Advanced Information Data Sheet, Rev Symbol ...
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... A (ADDRESS) E (CHIP ENABLE) LB, UB (BYTE ENABLE) W (WRITE ENABLE) D (DATA IN) Hi-Z Q (DATA OUT) Figure 8. Write Cycle 3 (LB/UB Controlled) MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor t AVAV t AVBH t t AVBL BLEH t BLWH t DVBH DATA VALID Hi-Z Timing Specifications t BHAX t BHDX 15 ...
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... Freescale MRAM Memory Prefix Density Code ( Mb) Memory Type (A = async sync) Package Information Pin Package Device Count MR0A16A 44 MR0A16A Advanced Information Data Sheet, Rev (Order by Full Part Number Table 13. Package Information Designator Case No ...
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... Sep 2007 Table 6: Applied values to TBD’s in IDD specifications Nov 2007 Table 2: Changed IDDA to IDDR or IDDW. Mechanical Drawing The following pages detail the package available to MR0A16A. MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor Revision History Description of Change Revision History ...
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... Mechanical Drawing MR0A16A Advanced Information Data Sheet, Rev Freescale Semiconductor ...
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... MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor Mechanical Drawing 19 ...
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... Mechanical Drawing MR0A16A Advanced Information Data Sheet, Rev Freescale Semiconductor ...
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... MR0A16A Advanced Information Data Sheet, Rev. 2 Freescale Semiconductor Mechanical Drawing 21 ...
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... Learn More: For more information about Freescale Semiconductor products, please visit http://www.freescale.com MR0A16A Rev. 2, 11/2007 Information in this document is provided solely to enable system and software implementers to use Freescale Semiconductor products. There are no express or implied copyright licenses granted hereunder to design or fabricate any integrated circuits or integrated circuits based on the information in this document ...