cat34ts02 ON Semiconductor, cat34ts02 Datasheet - Page 10

• Manufacturer Part Number: cat34ts02
• Description: Digital Output Temperature Sensor With On-board Spd Eeprom
• Manufacturer: ON Semiconductor

CAT34TS02
SOFTWARE WRITE PROTECTION
The lower half of memory (first 128 bytes) can be
protected against Write requests by setting one of two
Software Write Protection (SWP) flags.
The Permanent Software Write Protection (PSWP)
flag can be set or read while all address pins are at
regular CMOS levels (GND or V
high voltage V
to set, clear or read the Reversible Software Write
Protection (RSWP) flag. The D.C. OPERATING
CONDITIONS for RSWP operations are shown in
Table 1.
The SWP commands are listed in Table 2. All
commands are preceded by a START and terminated
with a STOP, following the ACK or NoACK from the
CAT34TS02. All SWP related Slave addresses use
the pre-amble: 0110 (6h), instead of the regular 1010
(Ah) used for memory access. For PSWP commands,
the three address pins can be at any logic level,
whereas for RSWP commands the address pins must
be at pre-assigned logic levels.
Table 1: RSWP D.C. Operation Condition
Doc. No. MD-1129 Rev. C
Symbol Parameter
ΔV
I
V
HVD
HV
HV
A
A
A
0
0
0
HV
High Voltage Detector Current
Very High Voltage
Overdrive (V
must be present on address pin A0
HV
- V
CC
CC
), whereas a very
)
Test Conditions
1.7 V < V
10
CC
V
must be established on pin A0 before the START
and maintained just beyond the STOP. Otherwise
an RSWP request could be interpreted by the
CAT34TS02 as a PSWP request.
The SWP Slave addresses follow the standard I
convention, i.e. to read the state of the SWP flag, the
LSB of the Slave address must be ‘1’, and to set or
clear a flag, it must be ‘0’. For Write commands a
dummy byte address and dummy data byte must be
provided (Figure 12). In contrast to a regular memory
Read, a SWP Read does not return Data. Instead the
CAT34TS02 will respond with NoACK if the flag is set
and with ACK if the flag is not set. Therefore, the
Master can immediately follow up with a STOP, as
there is no meaningful data following the ACK interval
(Figure 13).
HV
< 3.6 V
is interpreted as logic ‘1’. The V
Min
4.8
7
Characteristics subject to change without notice
© 2008 SCILLC. All rights reserved.
Max
0.1
10
HV
condition
Units
mA
V
V
2
C