stk14c88-n25m Simtek Corporation, stk14c88-n25m Datasheet - Page 2

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stk14c88-n25m

Manufacturer Part Number
stk14c88-n25m
Description
32kx8 Autostore Nvsram
Manufacturer
Simtek Corporation
Datasheet
STK14C88
Document Control #ML0014 Rev 2.0
PIN DESCRIPTIONS
PIN CONFIGURATIONS
A
DQ
E
W
G
V
HSB
V
V
14
CC
CAP
SS
Pin Name
V
-A
7
DQ
DQ
DQ
V
-DQ
Feb, 2008
NC
CAP
A
A
A
A
A
A
A
0
A
A
A
SS
14
12
7
6
3
2
1
5
4
0
0
1
2
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32-Pin 300 mil SOIC
32-Pin 300 mil CDIP
Input
I/O
Input
Input
Input
Power Supply
I/O
Power Supply
Power Supply
(TOP)
I/O
28
27
26
25
24
23
22
21
20
19
18
17
32
31
30
29
HSB
V
W
NC
A
A
DQ
DQ
DQ
DQ
DQ
A
A
A
G
E
CC
11
10
13
8
9
7
6
5
4
3
Address: The 15 address inputs select one of 32,768 bytes in the nvSRAM array
Data: Bi-directional 8-bit data bus for accessing the nvSRAM
Write Enable: The active low W enables data on the DQ pins to be written to the address
location latched by the falling edge of E
Output Enable: The active low G input enables the data output buffers during read cycles.
De-asserting G high caused the DQ pins to tri-state.
Power: 5.0V, +10%
Hardware Store Busy: When low this output indicates a Store is in progress. When pulled
low external to the chip, it will initiate a nonvolatile STORE operation. A weak pull up resistor
keeps this pin high if not connected. (Connection Optional).
SRAM to nonvolatile storage elements.
Ground
Chip Enable: The active low E input selects the device
AutoStore Capacitor: Supplies power to nvSRAM during power loss to store data from
2
DQ
NC
A
A
A
A
A
A
A
6
3
2
1
5
4
0
0
32-Pin 450 mil LCC
Description
(TOP)
A
DQ
A
A
A
A
NC
G
E
10
13
8
9
11
7

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