nm95hs02 National Semiconductor Corporation, nm95hs02 Datasheet - Page 9

• Manufacturer Part Number: nm95hs02
• Description: Hisec-tm High Security Rolling Code Generator
• Manufacturer: National Semiconductor Corporation

Data Frame Fields
KEY ID FIELD
The key ID field is another user option Both its presence
and the length of its field can be configured in EEPROM If
FixPresent
frame If FixPresent
The contents of the key ID field are programmable by the
user Its purpose is to provide a unique identification code
for each user key to allow a decoder to identify a particular
key in applications where a decoder may be configured for
multiple keys Since the key ID register allows 24 bits there
are 2
unique and take full advantage of the HiSeC Generator’s
high security coding scheme
The field size is selected with the FixSize bit If FixSize
the 24-bit field is selected If FixSize
selected Since a full 24 bits are allowed in the Key ID regis-
ter the NM95HS01 02 will transmit the most significant 20
bits if FixSize
lected bit coding format
DATA FIELD
The data field is transmitted with every frame It has several
uses which are discussed here
The primary use of the data field is to indicate which key
switch has been pressed Since each key switch input can
be associated with a particular application the decoder can
determine which function to initiate
The data field is 4 bits long and each key switch input is
associated with a particular bit in the field If any key switch
is pressed its corresponding bit in the data field will be seen
as a ‘‘1’’ Any key switch not pressed is seen as a default
‘‘0’’ Key bits are transmitted in the order K1 K2 K3 K4
The sync code field in the sync frame is a special case of
the data field and is found in the same position in the data
frame In any sync frame the sync code is always 0000 so
the decoder can always distinguish between a normal data
frame and a sync frame Since each bit represents a key
and a data frame is initiated as a result of pressing a key it
is not possible to have all zeroes in a normal data frame
The data field can also serve as a low battery indicator This
is an option which can be enabled by setting the Compar-
eEnable bit If CompareEnable
detects a low battery level the device will signal that fact by
alternating between transmitting normal data frames with
the correct key usage information and transmitting normal
data frames with a data field of 1111 In the first data frame
the data field will represent the true state of the four key
inputs In the next frame this field will be all ones This
sequence will be repeated as long as frames are being
transmitted For sync frames this field will not alternate and
the data will remain 0000 regardless of the battery level
Setting CompareEnable
option
24
possible key combinations Each user key will be
e
0 no key ID field will be transmitted with the
e
0 The field is transmitted in the user-se-
e
1 a 24-bit field will be transmitted
e
0 disables the low battery detect
e
(Continued)
1 and the NM95HS01 02
e
0 the 20-bit field is
e
1
9
DYNAMIC CODE FIELD
The dynamic code field is transmitted with every frame and
its length is programmable If DynSize
sent if DynSize
provide a secure dynamic code which changes with each
new transmission The field is the result of combining the
11- 13- and 16-bit CRC registers using non-linear logic and
feedback The result of this process is stored in the
24- 36-bit buffer register If DynSize
36 bits are transmitted in the field Increasing the field
length provides additional security
The start code field in a sync frame is a special case of the
dynamic code field In sync mode 40 bits of data are sent
regardless of the setting of the DynSize bit
PARITY FIELD
The parity field is an 8-bit field that is transmitted with every
frame to ensure data integrity It is a user option that is
enabled by setting ParityPresent
The parity check is a bytewise exclusive OR-ing of all the
bytes in the data frame from the sync field to the dynamic
code field The preamble parity field and stop bit are not
included In practice the parity process works as follows bit
m of the 8-bit parity field is a modulo 2 addition of the data
frame bits m m
the addition of the ‘‘1’’s in these bits is odd bit m of the
parity field is set to ‘‘1’’ If the addition is even bit m is set to
‘‘0’’ This process is continued for all 8 parity bits
If the frame is not byte aligned the parity field is calculated
by zero extending the last four bits calculating the bytewise
exclusive OR-ing of all the bytes as described above then
swapping the higher and lower nibbles to give the correct
parity
STOP BIT
The stop bit is present in all frames It is used to delimit the
end of the frame for bit formats that require a definite end It
is necessary for formats that end with a long zero pulse IR
modes require a stop bit to distinguish between a ‘‘0’’ and a
‘‘1’’ in the next-to-last bit of a frame The stop bit is read as
a ‘‘1’’ and is added for all modes
DATA FRAME SEQUENCING AND TRANSMISSION
The NM95HS01 02 becomes operational any time a key is
pressed When this happens the code generator logic is
clocked to randomize the data and generate a new rolling
code Once the code is generated data frames using this
new code are repeatedly transmitted over the TX output pin
as long as the key remains pressed These data frames are
separated by a pause whose length is programmable
The transmission sequence is always begun by a preamble
if this option is enabled The preamble is only transmitted
once since its function is to wake the decoder from sleep
mode if it is powered down for battery conservation The
preamble is then followed by a data frame pause data
frame pause
a
e
etc
8 m
1 a 36-bit field is sent Its function is to
a
16
to the end of the frame If
e
e
1
e
0 24 of the possible
0 a 24-bit field is
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