lh5164ash Sharp Microelectronics of the Americas, lh5164ash Datasheet - Page 8

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lh5164ash

Manufacturer Part Number
lh5164ash
Description
Manufacturer
Sharp Microelectronics of the Americas
Datasheet

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LH5164ASH
8
NOTES:
1. The writing occurs during an overlapping of CE
2. t
3. t
4. t
5. If CE
6. If CE
7. While I/O pins are in the output state, input signals with the opposite logic level must not be applied.
to the time when the writing is finished.
output will remain high-impedance.
output will remain high-impedance.
CW
AS
WR
is defined as the time from address change to writing start.
is defined as the time from the last occuring transition, either CE
is defined as the time from writing finish to address change.
1
1
LOW transition or CE
HIGH transition or CE
A
0
D
- A
CE
CE
WE
OUT
D
12
IN
OE = 'LOW'
1
2
(NOTE 7)
2
2
HIGH transition occurs at the same time or after WE LOW transition, the
(NOTE 5)
LOW transition occurs at the same time or before WE HIGH transition, the
Figure 7. Write Cycle 2 (OE Low Fixed)
(NOTE 3)
t
AS
1
= 'LOW,' CE
t
AW
2
t
WC
= 'HIGH,' and WE = 'LOW' (t
(NOTE 2)
t
WZ
1
t
CW
t
LOW transition or CE
CW
(NOTE 1)
t
HIGH-Z
WP
t
DW
DATA VALID
t
t
t
WR
WR
WR
(NOTE 6)
WP
2
CMOS 64K (8K
t
HIGH transition,
DH
).
t
(NOTE 4)
OW
8) Static RAM
5164ASH-5

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