ncp1250 ON Semiconductor, ncp1250 Datasheet - Page 18

• Manufacturer Part Number: ncp1250
• Description: Ncp1250 Current-mode Pwm Controller For Off-line Power Supplies
• Manufacturer: ON Semiconductor

inductance L
a N
S
turns into a voltage ramp of the following amplitude:
of ramp compensation, then we shall inject a ramp whose
slope is 17 mV/ms. Our internal compensation being of
133 mV/ms, the divider ratio (divratio) between R
the internal 20 kW resistor is:
The series compensation resistor value is thus:
sense resistor to the current sense pin. We recommend
adding a small capacitor of 100 pF, from the current sense
pin to the controller ground for an improved immunity to the
noise. Please make sure both components are located very
close to the controller.
Then, suppose we want to latch off our controller when V
exceeds 25 V. On the auxiliary winding, the plateau reflects
the output voltage by the turns ratio between the power and
the auxiliary winding. In case of voltage runaway for our
19 V adapter, the plateau will go up to:
p
S
S
R
In our flyback design, let’s assume that our primary
Given a sense resistor of 330 mW, the above current ramp
If we select 50% of the downslope as the required amount
A resistor of the above value will then be inserted from the
First, calculate the OPP network with the above equations.
is thus given by:
Figure 46. A Simple Resistive Divider Brings the OPP Pin Above 3 V in Case of a V
p
p
sense
comp
:N
+
100p
C1
s
ratio of 1:0.25. The off−time primary current slope
+
+ S
+ 34 kV s or 34 mV ms
V
out
( 1 * divratio )
R
p
p
ramp
) V
L
R
is 770 mH, and the SMPS delivers 19 V with
p
sense
ROPPL
1k
divratio +
divratio
f
N
N
s
p
10
+ 103k
+
OP P
( 19 ) 0.8 )
+
133m
17m
Vlatch
20k
1 * 0.127
770m
0.33
+ 0.127
0.127
4
5
4
R3
5k
+ 103 kA s
[ 2.9 kW
RoppU
421k
comp
(eq. 12)
(eq. 13)
(eq. 14)
(eq. 11)
http://onsemi.com
and
1
out
OVP
18 V
11
18
D2
1N4148
Latching Off the Controller
current set point in relationship to the line voltage, it also
offers a means to permanently latch−off the part. When the
part is latched−off, the V
around 7 V and the part stays in this state until the user cycles
the V
converter from the mains outlet. It is important to note that
the SCR maintains its latched state as long as the injected
current stays above the minimum value of 30 mA. As the
SCR delatches for an injected current below this value, it is
the designer duty to make sure the injected current is high
enough at the lowest input voltage. Failure to maintain a
sufficiently high current would make the device auto
recover. A good design practice is to ensure at least 60 mA
at the lowest input voltage. The latch detection is made by
observing the OPP pin by a comparator featuring a 3 V
reference voltage. However, for noise reasons and in
particular to avoid the leakage inductance contribution at
turn off, a 1 ms blanking delay is introduced before the
output of the OVP comparator is checked. Then, the OVP
comparator output is validated only if its high−state duration
lasts a minimum of 600 ns. Below this value, the event is
ignored. Then, a counter ensures that 4 successive OVP
events have occurred before actually latching the part. There
are several possible implementations, depending on the
needed precision and the parameters you want to control.
divider on top of the OPP one. This solution is simple and
inexpensive but requires the insertion of a diode to prevent
disturbing the OPP divider during the on time.
1 kW selected OPP pulldown resistor, it implies a 3 mA
current. From 3 V to go up to 18 V, we need an additional
The OPP pin not only allows a reduction of the peak
The first and easiest solution is the additional resistive
Since our OVP comparator trips at a 3 V level, across the
CC
down and up again, e.g. by un−plugging the
OPP
V
aux,OVP
+ 25
CC
CC
VCC
pin is internally pulled down to
Voltage Runaway above
0.18
0.25
+ 18 V
9
8
aux.
winding
(eq. 15)