ncp1081 ON Semiconductor, ncp1081 Datasheet
ncp1081
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ncp1081 Summary of contents
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... ON Semiconductor’s unique manufacturing process and design enhancements allow the NCP1081 to deliver up to 25.5 W for the draft IEEE802.3at (D3.0) standard and for proprietary high power PoE applications. The NCP1081 enables the draft IEEE802.3at (D3 ...
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... Tape & Reel (Pb−Free) INTERNAL THERMAL SUPPLY SHUT & DOWN BANDGAP VPORT MONITOR CONVERTER CONTROL HOT SWAP SWITCH CONTROL & CURRENT LIMIT BLOCKS Figure 1. NCP1081 Block Diagram http://onsemi.com 2 PIN DIAGRAM COMP VDDL Exposed VDDH Pad GATE RTN ARTN nCLASS_AT ...
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... R2 FB TEST1 ARTN VPORTN1 RTN VPORTN2 Rosc Css Figure 2. Isolated Fly−back Converter VPORTP Rclass CLASS Rinrush INRUSH Rilim1 ILIM1 NCP1081 R1 nCLASS_AT UVLO TEST2 R2 TEST1 VPORTN1 VPORTN2 Css Rosc Figure 3. Non−Isolated Fly−back Converter http://onsemi.com 3 Cpd D1 T1 Cvddh LD1 ...
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... Figure 4 shows the same non−isolated fly−back configuration as Figure 3, but adds auxiliary bias winding on the transformer to provide power to the NCP1081 DC−DC controller via its VDDH pin. This topology shuts off the current flowing from VPORTP to VDDH and therefore reduces the internal power dissipation of the PD, resulting in higher overall power efficiency. RJ− ...
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Table 1. Pin Descriptions Name Pin No. Type VPORTP 1 Supply VPORTN1 6,8 Ground VPORTN2 RTN 7 Ground ARTN 14 Ground VDDH 16 Supply VDDL 17 Supply CLASS 2 Input INRUSH 4 Input ILIM1 5 Input UVLO 3 Input GATE ...
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Table 2. Absolute Maximum Ratings Symbol Parameter VPORTP Input power supply RTN Analog ground supply 2 ARTN VDDH Internal regulator output VDDL Internal regulator output CLASS Analog output INRUSH Analog output ILIM1 Analog output UVLO Analog input OSC Analog output ...
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Recommended Operating Conditions Operating conditions define the limits for functional operation and parametric characteristics of the device. Note that the functionality of the device outside the operating conditions described in this section is not warranted. Operating outside the recommended operating ...
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Table 3. Operating Conditions Symbol Parameter UVLO Vuvlo_on Default turn on voltage (VportP rising) Vuvlo_off Default turn off voltage (VportP falling) Vhyst_int UVLO internal hysteresis Vuvlo_pr UVLO external programming range Vhyst_ext UVLO external hysteresis Uvlo_Filter UVLO on/off filter time PASS−SWITCH ...
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Table 3. Operating Conditions Symbol Parameter VDDH REGULATOR VDDH_reg Regulator output voltage (Notes 10 and 11) Ivddh_load + Ivddl_load < with 0 < Ivddl_load < 2.25 mA VDDH_Off Regulator turn−off voltage VDDH_lim VDDH regulator current limit (Notes 10 ...
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Table 3. Operating Conditions Symbol Parameter CURRENT CONSUMPTION IvportP VPORTP internal current 1 consumption (Note 12) IvportP VPORTP internal current 2 consumption (Note 13) THERMAL SHUTDOWN TSD Thermal shutdown threshold Thyst Thermal hysteresis THERMAL RATINGS Ta Ambient temperature Tj Junction ...
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... In order to give more flexibility to the user and also to keep control of the power dissipation in the NCP1081, both current limits are configurable. The device enters operation once its programmable Vuvlo_on threshold is reached, and operation ceases when the supplied voltage falls below the Vuvlo_off threshold ...
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... PSE performed a one or two event hardware classification two event hardware classification has occured and once the PD application is supplied power by the NCP1081 DC−DC converter, the nCLASS_AT pin will be pulled down to ARTN by the internal low voltage NMOS VDDL 20uA ...
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... As soon as the application is powered by the DC−DC converter and completes initialization, the microprocessor should check if the NCP1081 detected a two event hardware classification by reading its digital input (pin IN1 in this example). If pin IN1 is low, the application knows power is supplied by a draft IEEE802.3at (D3.0) compliant PSE, and can deliver power up to the level specified by the draft IEEE802 ...
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... VDDH and VDDL regulators • CLASS regulator When the TSD error disappears and if the input line voltage is still above the UVLO level, the NCP1081 automatically restarts with the current limit set in the inrush state, the DC−DC controller is disabled and the Css is 1,2 (soft− ...
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... DC−DC Converter Controller The NCP1081 implements a current mode DC−DC converter controller which is illustrated in Figure 13. VDDL 1 COMP Current Slope Compensation 11 kW Blanking CS time VDDL Soft−start Internal VDDH and VDDL Regulators and Gate Driver An internal linear regulator steps down the VPORTP voltage output on the VDDH pin ...
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... NCP1081 integrates a current slope compensation circuit. The amplitude of the added slope compensation is typically 110 mV over one cycle example, for an operating switching frequency of 250 kHz, the internal slope provided by the NCP1081 is 27.5 mV/mA typically. DC−DC Controller Oscillator The frequency is configured with the Rosc resistor ...
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... DIM MIN MAX M A --- 1.10 A1 0.05 0.15 A2 0.85 0.95 b 0.19 0.30 b1 0.19 0.25 c 0.09 0.20 c1 0.09 0.16 D 6.40 6.60 E 6.40 BSC L2 E1 4.30 4.50 e 0.65 BSC GAUGE L 0.50 0.70 PLANE L2 0.25 BSC --- 4.20 P1 --- 3.00 C SOLDERING FOOTPRINT* 4.30 3.10 20X 0.65 0.35 PITCH DIMENSIONS: MILLIMETERS ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCP1081/D ...