ncp1601a ON Semiconductor, ncp1601a Datasheet - Page 10

• Manufacturer Part Number: ncp1601a
• Description: Compact Fixed Frequency Discontinuous Or Critical Conduction Voltage Mode Power Factor Correction Controller
• Manufacturer: ON Semiconductor

be too bulky because it can pollute the power factor by
distorting the rectified sinusoidal input voltage.
PFC Methodology
particularly designed for both DCM and CRM operation.
The PFC methodology is described in this section.
switching cycle starts from zero in DCM. CRM is a special
case of DCM when t
MOSFET is on, the inductor current I
to I
voltage V
filter absorb the high−frequency component of inductor
current. It makes the input current I
signal.
formulated.
NCP1601 uses a proprietary PFC methodology
As shown in Figure 27, the inductor current I
The input filter capacitor C
From (eq.1) and (eq.2), the input impedance Z
Inductor Current
pk
for a time duration t
Figure 26. DCM/CRM PFC Boost Converter
V
in
t
1
Figure 27. Inductor Current in DCM
in
. (eq.1) is formulated.
I
in
Z in +
Z in +
I in +
I in +
C
3
filter
I
L
t
V in
V in
I pk
I in
I in
2
= 0. When the PFC boost converter
I pk ( t 1 ) t 2 )
T
2
V in + L
+
+
2 T
1
t 1 ( t 1 ) t 2 )
2L
t 1
filter
with inductance L and input
L
I pk
2TL
t 1
and the front−ended EMI
t
3
I
pk
L
in
increases from zero
for DCM
for CRM
for DCM
for CRM
a low−frequency
NCP1601A, NCP1601B
L
of each
(eq.2a)
(eq.2b)
(eq.3a)
(eq.3b)
http://onsemi.com
C
(eq.1)
bulk
V
in
time
out
is
10
in (eq.3) are constant or slowly varying.
generated by a feedback signal V
modulation circuit and timing diagram are shown in
Figure 28. A relationship in (eq.4) is obtained.
the ramp capacitor C
Hence, according to (eq.4) the MOSFET on time t
proportional to V
maximum voltage of V
V
9 V ESD Zener diode. The 3.9 V maximum limit of this
V
control voltage V
inductor current. The circuit in Figure 29 makes (eq.5)
where the value of resistor R
of resistor R
C
ton(max)
ton
Power factor is corrected when the input impedance Z
The MOSFET on time t
The charging current I
In order to protect the PFC modulation comparator, the
The V
control
Ramp
C
ramp
Figure 28. PFC Modulation Circuit and Timing
indirectly limits the maximum on time.
V
control
control
Figure 29. V
3
(3.9 V typical) and the ramp pin (Pin 3) is with a
2
output
ramp
(R
V
2
V ton +
ton
processing circuit generates V
1
ton
>> R
closed when
output low
control
.
t 1 +
ramp
control
T V control
2
R
Diagram
).
ch
ton
t 1 ) t 2
is constant for a particular design.
C ramp V ton
1
and time information of zero
I
ch
is constant 100 mA current and
1
1
Processing Circuit
is limited to internal clamp
−
+
is much higher than the value
or PFC modulation duty is
I ch
closed when zero current
C
1
ton
R
2
V
and a ramp. The PFC
PFC
Modulation
ton
+
−
for DCM
R
3
Turns off
MOSFET
ton
(eq.5a)
(eq.4)
from
V
1
C
ton
3
is
in